www.sciencemag.org/cgi/content/full/332/6029/570/DC1

Supporting Online Material for Low-Voltage, Low-Power, Organic Light-Emitting Transistors for Active Matrix Displays M. A. McCarthy, B. Liu, E. P. Donoghue, I. Kravchenko, D. Y. Kim, F. So, A. G. Rinzler*

*To whom correspondence should be addressed. E-mail: [email protected] Published 29 April 2011, Science 332, 570 (2011) DOI: 10.1126/science.1203052

This PDF file includes: Materials and Methods Figs. S1 to S5 Table S1 References

Supporting Online Material M. A. McCarthy, B. Liu, E. P. Donoghue, I. Kravchenko, D. Y. Kim, J. R. Reynolds, F. So and A. G. Rinzler Materials and Methods Carbon nanotube enabled vertical organic light emitting transistor (CN-VOLET) and organic light emitting diode (OLED) device fabrication: Glass substrates were used with pre-patterned 100 ohm/sq tin-doped indium oxide (ITO) from Kintec serving as the gate electrode (CN-VOLET) or anode (OLED). Four individually patterned ITO pads were defined allowing fabrication of as many CNVOLET or OLED control devices per substrate. The ITO was cleaned by scrubbing with an electric Sonicare toothbrush in Alconox/deionized (DI) water solution and then sequential sonication in: Alconox/DI water solution, DI water, acetone and isopropanol; for 5 min each. Following sonication in isopropanol, the ITO substrates were blown dry with nitrogen gas. After cleaning, the CN-VOLET substrates were packaged and shipped to the Center for Nanophase Materials Sciences at Oak Ridge National Laboratory for atomic layer deposition (ALD) of the Al2O3 dielectric. Prior to ALD, the substrates were cleaned with oxygen plasma in a reactive ion etcher (5 mTorr working pressure, RF power 100 W, O2 flow 20 sccm) for 30 s. Deposition took place in an Oxford Instruments FlexAL ALD reactor. A standard Oxford Instruments recipe was used: with trimethylaluminum as the precursor and O2 as the oxidant at a substrate temperature of 150° C. The recipe included a 3 min long pre-heat step in an oxygen flow environment kept at a pressure of 200 mTorr. Following ALD, the CN-VOLET substrates were shipped back to the University of Florida for the remainder of the fabrication process. After receipt of the substrates, benzocyclobutene (BCB, trade name Cyclotene from The Dow Chemical Co.) was diluted in trimethylbenzene (Rinse Solvent RST1100, Dow) and applied by spin coating in an Argon glovebox. The BCB layer improved device performance (28, 31) The BCB thin film was soft baked to drive off residual solvent at 100° C for 20 min and then hard baked at 250° C for 1hr. During the hard bake, BCB cross-links and becomes insoluble to the subsequent solvents (acetone and isopropanol) used in the transferring of the nanotube source electrode. Subsequently, Cr/Au (10/50 nm) source contacts were deposited through a shadow mask in a vacuum thermal evaporation chamber at a pressure of 5 × 10-7 Torr. All subsequent thermal evaporations also occur through a shadow mask at this pressure. During growth, all deposition rates were monitored in situ by a Sigma Instruments quartz crystal monitor.

 

1

The dilute nanotube source electrodes were transferred by previous methods (32). Fig. S1 shows an atomic force microscope (AFM) image and corresponding transmittance spectrum of the nanotube source electrode used in the CN-VOLET. The nanotube films were transferred in 2 mm wide strips. Lithography and subtractive etching (33) in a barrel asher (oxygen plasma) were used to reduce the width of the nanotube strips down to 1 mm. Following nanotube transfer and patterning, dinaphtho-[2,3-b:2′,3′f]thieno[3,2-b]-thiophene (DNTT), from Nippon Kayaku Co., Ltd. was thermally evaporated from an effusion cell (Luxel Corp.) held at ~ 215° C at a rate of ~4 Å/s to a thickness of 500 nm. Next, 2 nm of MoOx (Strem Chemicals Inc.) was evaporated at ~0.5 Å/s onto the DNTT during the same vacuum pump-down cycle as means to reduce the barrier with the subsequently deposited layer. Without exposure to ambient, for planarization, poly(9,9-dioctyl-fluorene-co-N-(4-butylphenyl)-diphenylamine) (TFB, American Dye Source, Inc.) was spin coated from toluene solution onto the MoOx layer in argon. Following the TFB coating, the substrates were transferred back into the vacuum chamber (without ambient exposure) for deposition of the 20 vol % MoOx doped 1,1-bis[(di-4-tolyamino)phenyl]cyclo-hexane (TAPC) layer. Co-evaporation was used to simultaneously deposit the two materials. TAPC was evaporated from an effusion cell held at ~210° C maintaining a growth rate of 2.0 Å/s while MoOx was grown at 0.5 Å/s, from a tungsten boat. The devices were exposed to ambient air; which was found to improve the conductivity of the base layers. The devices were subsequently transferred back into the argon glovebox for a short period where they awaited OLED layer deposition. During this period, the precleaned ITO/glass OLED substrates were UV-ozone treated for 15 min and then immediately loaded into the evaporation chamber along with the CN-VOLETs for simultaneous deposition of the light emitting layers. Prior to this UV-ozone step, the OLED substrates received Cr/Au (10/50 nm) ITO contacts. The chemical name, abbreviation and supplier for the light emitting layers are given in Table S1. The film stack and layer thicknesses and electroluminescent layer doping concentrations of the OLED layers for the red, green and blue devices are given in Fig. 1 of the main paper. The growth rates of TAPC, CBP, mCP and 3TPYMB were 2.0 Å/s. The doped electroluminescent layers were deposited by co-evaporation. The OLED layers TAPC through 3TPYMB were sequentially deposited during the same vacuum pump-down cycle for the respective color CN-VOLET/OLED. Following deposition of the OLED layers, the CN-VOLET and OLED devices were transferred to the metals evaporation chamber for LiF and Al deposition. LiF was grown at 0.1 Å/s with the same shadow mask as that used for the OLED layers. The chamber was vented to switch shadow masks for defining the 1 mm wide Al drain electrode. Al was grown at 2.0 Å/s. The 1 mm wide Al drain/cathode crosses the 1 mm wide nanotube source (CN-VOLET)/1 mm wide ITO anode (OLED) thereby defining the 1 mm by 1 mm pixel. Following Al deposition Cr/Au (10/50 nm) CN-VOLET gate contacts were deposited over the ITO (adjacent its pixel)  

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while simultaneously re-depositing Cr/Au over the previously deposited Cr/Au source contacts (CN-VOLET). A diamond scribe was used to scratch through the Al2O3/BCB/TFB down to the ITO gate to allow electrical contact of the Cr/Au. Stainless steel tweezers were used to scratch through the TFB over the pre-deposited source contacts, also to allow electrical contact of the Cr/Au. The CN-VOLET and OLED devices were electrically contacted using an in-house fabricated clamping mechanism with spring loaded Au-coated probes for source, drain and gate contact (CN-VOLET) or anode and cathode contact (OLED). All measurements took place inside an argon glovebox with O2 and H2O levels below 0.1 ppm. The clamping mechanism has a 14 mm hole beneath the substrate to allow the emitted light to escape and be measured. A Si photodiode (SD 444-12-12-171, Advanced Photonix Inc.) was used to measure the light output. Prior to device measurement, the photodiode was calibrated over a luminance range of ~50 to 500 cd/m2 with a Minolta LS-100 luminance meter. The photocurrent was measured with a Keithley 2400 Sourcemeter. Device measurements were performed using a two-channel Keithley 2612A Sourcemeter, one channel for the drain/cathode voltage and current of the CN-VOLET/OLED, the otherchannel for the gate voltage and current of the CN-VOLET. The two Sourcemeters were simultaneously controlled by a GPIB interfaced computer with a program written in LabVIEW. In all measurements the source of the CN-VOLET and anode (ITO) of the OLED were held at ground potential. Dielectric characterization: Metal-insulator-metal (MIM) capacitors were fabricated to evaluate the capacitance and breakdown characteristics of the Al2O3+BCB dielectric. ITO on glass was prepared the same way as above (same ITO thickness, pattern, substrate size and cleaning procedure). The ALD and BCB coatings were also the same as above. For the MIM devices, the ITO served as the bottom “metal” layer, and gold (50 nm) was thermally evaporated as the top metal layer, with Al2O3 and BCB sandwiched in between. J-V characteristics of these devices were measured with a Keithley 2612A Sourcemeter and are plotted in Fig. S2. The top gold electrode was held at ground and the voltage applied to the ITO. Inset in Fig. S2 shows a cross section of the MIM device. Breakdown effects were not observed until the applied voltage exceeded ±10 V; a sizeable cushion for the ±3 V required for the CN-VOLET. The capacitance as measured by an HP 4284A Precision LCR meter at 1 kHz at a modulation amplitude of 100 mV, operated in parallel capacitance-resistance (Cp-Rp) mode. The MIM device had an areal capacitance of 219 nF/cm2. Doping and Planarization Experiments: Experimental CN-VFET devices were fabricated to investigate the effects of the MoOx doping. Heavily p-doped crystalline Si substrates with a 200 nm thermal oxide  

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were used in place of the glass/ITO/Al2O3: Si as the gate and the thermal oxide as the first dielectric layer. The lower capacitance of the thick oxide modifies the gate voltages needed, but for testing the relative effects of various organic semiconductor layers in the CN-VFET stack, this substitution is irrelevant. Following a light cleaning of the oxide surface in acetone and isopropanol, an 8 nm thick BCB layer was spin coated onto the oxide as described above. A dilute CNT network source electrode and Cr/Au source contacts were also transferred as above. The CNT film was baked at 225°C as above and 450 nm of DNTT was grown at 4 Å/s. Contact to the underlying Si gate was made by scratching through the overlying layers with a diamond scribe in the periphery and pressing an indium dot in place. To investigate the effects of a MoOx interfacial layer (IL) at each TFB interface, the device pictured in Fig. S3A was fabricated. Four devices were made: i) no ILs, ii) the first IL, iii) the second IL and iv) both ILs. The MoOx and TFB layers were deposited as described above. Fig. S3B shows a drain current density versus drain voltage (JD-VD) plot of the four devices in the on-state (VG = −40 V). No improvement in JD is observed when only IL #1 was present. However, when IL #2 was present, a noticeable increase was observed. When both IL #1 and #2 were included, a further increase in JD was observed. Therefore, it is clear that there is a larger barrier at the TFB/Au interface than at the DNTT/TFB interface. However, when the TFB/Au barrier is minimized by addition of the MoOx IL, the effect of the MoOx IL at the DNTT/TFB can be observed, demonstrating that MoOx is indeed required at the DNTT/TFB interface. Figure S4 shows the planarizing effect of the TFB layer. The root mean square (RMS) roughness of the bare 450 nm thick DNTT layer grown at 4 Å/s onto dilute CNTs on BCB (Fig. S4A) was ~27 nm. After adding the TFB layer, this RMS roughness decreased to ~11 nm (Fig. S4B). The devices used to investigate the effect of the 100 nm MoOx doped TAPC layer are pictured in Fig. S5A. The JD-VD curves in Fig. S5B show a negligible decrease in JD in the device with the doped TAPC layer.

 

4

Supplementary Figures

A

B 1μm

Transmittance (%)

100.0 99.5 99.0 98.5 98.0 0

400

1μm

0

800

1200 1600 2000 2400

Wavelength (nm)

Figure S1. (A) AFM image and (B) transmittance spectrum of the dilute nanotube network used for the source electrode in the CN-VFET and -VOLET.

Voltage (V) 0.01 2

Current Density (A/cm )

1E-3 1E-4 1E-5 1E-6

-10

-5

0

5

10

15

Au 50nm BCB 4.5nm ALD Al2O3 15nm

V

ITO 23nm glass

1E-7 1E-8 1E-9 1E-10

C = 219 nF/cm

-6M -4M -2M

1 2 3

2

0

2M

4M

6M

8M

Electric Field (V/cm)

Figure S2. J-V leakage plot of the device pictured in the inset. The capacitance of this dielectric stack is inset in the lower left of the plot.  

5

Interface layer (IL – MoOx 2nm):

Au 30nm

TFB S

B

1000 100

IL #2 IL #1

DNTT 450nm BCB 8nm

200nm SiO2 p+ Si

G In dot gate contact

VG= -40 V

10 1

2

D

JD (mA/cm )

A

0.1 0.01

No ILs IL #1 IL #2 IL #1 and 2

1E-3 1E-4 1E-5

-5

-4 -3 -2 -1 Drain Voltage (V)

0

Figure S3. Interfacial MoOx doping experiments. (A) Experimental device schematic showing the two places MoOx interfacial layers (ILs) were investigated. (B) JD-VD data in the on-state of the device (VG = -40 V) for the four devices. The device with both ILs yielded the highest current.

A

B

RMS roughness = 27 nm

RMS roughness = 10.5 nm

Figure S4. AFM micrographs at 5×5 μm2 scan size of 450 nm of DNTT on dilute CNTs on BCB (A) with no planarization layer and (B) with a TFB planarization layer. The film stack in (B) includes both MoOx ILs and excludes the gold top electrode (Fig. S3A).

 

6

A DNTT/MoOx/TFB/TAPC:MoOx/Au

DNTT/MoOx/TFB/MoOx/Au

Au 30nm Au 30nm

TAPC:MoOx 20 vol%

MoOx 2nm

TFB 90nm

100nm

TFB 90nm

MoOx 2nm

DNTT 750nm

DNTT 750nm

BCB 8nm

BCB 8nm

200nm SiO2

200nm SiO2

p+ Si

p+ Si

B 100 VG= -40 V

10

2

JD (mA/cm )

1 0.1 0.01

DNTT/MoOx/TFB/ TAPC:MoOx/Au DNTT/MoOx/TFB/ MoOx/Au

1E-3 1E-4 1E-5 1E-6

-5

-4

-3

-2

-1

0

Drain Voltage (V) Figure S5. Doped TAPC layer experiment. (A) Device schematics; (B) J-V comparison of the two devices pictured in (A) in the on-state.

 

7

Table S1. Abbreviation TAPC

Chemical name 1,1-bis[(di-4tolyamino)phenyl]cyclohexane CBP 4,4-N,N-dicarbazole-biphenyl mCP N,N’-dicarbazolyl-3,5-benzene Ir(MDQ)2 iridium(III)bis(2methyldibenzo[f,h]quinoxaline) (acetylacetonate) Ir(ppy)3 fac-tris(2phenylpyridinato)iridium(III) FIrpic bis[(4,6-di-fluorophenyl)-pyridinateN ,C2’]picolinate 3TPYMB tris[3-(3-pyridyl)-mesityl]borane LiF LiF *Luminescence Technology Corp.

Supplier EJY Tech, Inc Lumtec* Lumtec Lumtec Lumtec Lumtec Lumtec Alfa Aesar

 

 

8

References and Notes 1. G. Gu, S. R. Forrest, Design of flat-panel displays based on organic light-emitting devices. IEEE J. Sel. Top. Quantum Electron. 4, 83 (1998). 2. M. J. Powell, The physics of amorphous-silicon thin-film transistors. IEEE Trans. Electron. Dev. 36, 2753 (1989). 3. A. Nathan, G. R. Chaji, S. J. Ashtiani, Driving Schemes for a-Si and LTPS AMOLED displays. J. Display Technol. 1, 267 (2005). 4. M. J. Powell, C. Vanberkel, J. R. Hughes, Time and temperature dependence of instability mechanisms in amorphous silicon thin-film transistors. Appl. Phys. Lett. 54, 1323 (1989). 5. C.-P. Chang, Y.-C. S. Wu, Improved electrical performance and uniformity of MILC poly-Si TFTs manufactured using drive-in Nickel-induced lateral crystallization. IEEE Electron Device Lett. 30, 1176 (2009). 6. Y. J. Park, M. H. Jung, S. H. Park, O. Kim, Voltage-programming-based pixel circuit to compensate for threshold voltage and mobility using natural capacitance of organic light-emitting diode. Jpn. J. Appl. Phys. 49, 03CD01 (2010). 7. P.-S. Lin, T.-S. Li, The impact of scaling-down oxide thickness on poly-Si thin-film transistors' I-V characteristics. IEEE Electron Device Lett. 15, 138 (1994). 8. S. Ohta et al., Active matrix driving organic light-emitting diode panel using organic thin-film transistors. Jpn. J. Appl. Phys Part 1. 44, 3678 (2005). 9. T. Tsujioka, H. Fujii, Y. Hamada, H. Takahashi, Driving duty ratio dependence of lifetime of tris(8-hydroxy-quinolinate)aluminum-based organic light-emitting diodes. Jpn. J. Appl. Phys. Part 1 40, 2523 (2001). 10. M. A. McCarthy, B. Liu, A. G. Rinzler, High current, low voltage carbon nanotube enabled vertical organic field effect transistors. Nano Lett. 10, 3467 (2010). 11. B. Liu et al., Carbon-nanotube-enabled vertical field effect and light-emitting transistors. Adv. Mater. (Deerfield Beach Fla.) 20, 3605 (2008). 12. B. Park, H. Takezoe, Enhanced luminescence in top-gate-type organic light-emitting transistors. Appl. Phys. Lett. 85, 1280 (2004). 13. H. Iechi et al., Vertical type organic light emitting device using thin-film ZnO electrode. Synth. Met. 154, 149 (2005). 14. K. Kudo, Organic light emitting transistors. Curr. Appl. Phys. 5, 337 (2005). 15. S. Y. Oh, H. J. Kim, S. K. Hwang, Vertical type organic transistor using C 60 and its application for OLET. Mol. Cryst. Liq. Cryst. 458, 247 (2006). 16. Z. Xu, S. H. Li, L. Ma, G. Li, Y. Yang, Vertical organic light emitting transistor. Appl. Phys. Lett. 91, 092911 (2007). 17. H. Yamauchi, M. Iizuka, K. Kudo, Fabrication of vertical organic light-emitting transistor using ZnO thin film. Jpn. J. Appl. Phys. Part 1 46, 2678 (2007). 9

18. K. Nakamura et al., Improvement of metal–insulator–semiconductor-type organic light-emitting transistors. Jpn. J. Appl. Phys. Part 1 47, 1889 (2008). 19. The effective aperture ratio is defined as the percent areal coverage of the lightemitting portion of the device compared to the total area occupied by the driving transistor, storage capacitor, and light emitter. For the MIS-OLET and CNVOLET, the use of a storage capacitor is unnecessary due to the larger gate capacitance of the devices. This definition excludes the switching transistor and addressing lines (necessary components of any AMOLED display), allowing direct comparison of the relevant components of an AMOLED pixel that the CNVOLET replaces. 20. C. Adachi, R. Kwong, S. R. Forrest, Efficient electrophosphorescence using a doped ambipolar conductive molecular organic thin film. Org. Electron. 2, 37 (2001). 21. Materials and methods are available as supporting material on Science Online. 22. T. Yamamoto, K. Takimiya, Facile synthesis of highly pi-extended heteroarenes, dinaphtho[2,3-b:2′,3′-f]chalcogenopheno[3,2-b]chalcogenophenes, and their application to field-effect transistors. J. Am. Chem. Soc. 129, 2224 (2007). 23. M. A. McCarthy et al., Reorientation of the high mobility plane in pentacene-based carbon nanotube enabled vertical field effect transistors. ACS Nano 5, 291 (2011). 24. T. Matsushima, C. Adachi, Enhanced hole injection and transport in molybdenumdioxide-doped organic hole-transporting layers. J. Appl. Phys. 103, 034501 (2008). 25. S. Tokito, K. Noda, Y. Taga, Metal oxides as a hole-injecting layer for an organic electroluminescent device. J. Phys. D Appl. Phys. 29, 2750 (1996). 26. M. Kimura et al., Low-temperature polysilicon thin-film transistor driving with integrated driver for high-resolution light emitting polymer display. IEEE Trans. Electron. Dev. 46, 2282 (1999). 27. M. H. Jung, I. Choi, H. J. Chung, O. Kim, Novel digital driving method using dual scan for active matrix organic light-emitting diode displays. Jpn. J. Appl. Phys. 47, 8275 (2008). 28. B. Liu, M. A. McCarthy, A. G. Rinzler, Non-volatile organic memory elements based on carbon-nanotube-enabled vertical field-effect transistors. Adv. Funct. Mater. 20, 3440 (2010). 29. The turn-on voltage is defined as the voltage at which the luminance surpasses 0.02 cd/m2. This value is just above the off-state noise level measured by the Si photodiode used for the luminance measurements. 30. The display brightness (LD) accounts for the limited emitting area of the OLED as defined by its effective aperture ratio (A). To achieve a given display brightness, the OLED must be driven at a larger luminance (LO). The display brightness can be defined as LD = LO × A. 31. L. L. Chua et al., General observation of n-type field-effect behaviour in organic semiconductors. Nature 434, 194 (2005). 10

32. Z. C. Wu et al., Transparent, conductive carbon nanotube films. Science 305, 1273 (2004). 33. A. Behnam et al., Resistivity scaling in single-walled carbon nanotube films patterned to submicron dimensions. Appl. Phys. Lett. 89, 093107 (2006). Acknowledgments: We thank J. R. Reynolds (University of Florida) for useful discussions. We thank K. Takimiya (Hiroshima University) and E. Kanoh (Nippon Kayaku Co., Ltd.) for supplying the DNTT, and the University of Florida Nanoscale Research Facility for use of equipment and technical support. A portion of this research was conducted at the Center for Nanophase Materials Sciences, which is sponsored at Oak Ridge National Laboratory by the Scientific User Facilities Division, U.S. Department of Energy. We acknowledge support from the NSF (ECCS-0824157) and Nanoholdings LLC. The University of Florida has filed patent applications for the CN-VOLET architecture and for its use in AMOLED displays.

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Supporting Online Material for - Science

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