Russian Microelectronics, Vol. 28, No. 3, 1999, pp. 135–145. Translated from Mikroelektronika, Vol. 28, No. 3, 1999, pp. 163–174. Original Russian Text Copyright © 1999 by Neizvestnyi, Sokolova, Shamiryan.

Single Electronics. Part II: Application of Single-Electron Devices I. G. Neizvestnyi, O. V. Sokolova, and D. G. Shamiryan Institute of Semiconductor Physics, Siberian Division, Russian Academy of Sciences, pr. Akademika Lavrent’eva 13, Novosibirsk, 630090 Russia Received June 1, 1998

Abstract—In this part of the review, the possible applications of single-electron devices as gates and memory cells in digital circuitry are considered. Without trying to completely cover the problem, the authors demonstrate recent advances in the area of single electronics.

Possible applications of single-electron devices were first proposed by Likharev in his early works [1–5]. Because of high sensitivity of single-electron devices to an external charge, he suggested using them as electrometers. From equation (7) in [6], it follows that I = f × e; i.e., a current reference can be made. Also, single-electron devices can be applied as logic gates in digital circuits. This application seems to be the most important, since the majority of the related works are concerned with the use of single-electron devices in digital electronics. In [7], the dynamic characteristics of inverters based on single-electron transistors with resistive and capacitive inputs (Fig. 1) are analyzed. These inverters oper-

VL

ate as follows. If the input voltage Vin is small (logic “0”) and is insufficient to overcome Coulomb blockade, the current does not pass through the transistor and the output voltage Vout corresponds to logic “1.” When Vin rises to the value that eliminates Coulomb blockade (logic “1”), the current begins to pass through the transistor and the potential Vout falls to logic “0.” The characteristics were evaluated by the Monte Carlo method. Figure 2 shows the static characteristics of the inverters based on (a) capacitive-input and (b) resistive-input transistors. The dynamic characteristics of these inverters, which were obtained by applying a logic-“1” pulse to the input, are presented in Fig. 3. The authors of [7] also studied inverter cascades with and

(a)

(b) RL

RL B

Vout

B

Vout

C1, R1 C1, R1 Vin

Cin

Vin Cout

A C2, R2

Rin A

Cout C2, R2

Fig. 1. (a) Capacitive and (b) resistive single-electron inverters [7]. 1063-7397/99/2803-0135 $22.00 © 1999 åÄàä “ç‡Û͇ /Interperiodica”

Rout

136

NEIZVESTNYI et al. 0.4 VL /(e/2C1) = 0.25

(a)

VL /(e/2C1) = 0.30 VL /(e/2C1) = 0.35

0.3

Vout /(e/2C1)

VL /(e/2C1) = 0.40

0.2

0.1

C1 = C2 = Cin/5 = Cout/10 R1 = R2 = RL /10 (e2/2C1)/kT = 1000

0

0.1

0.2

0.3

0.4

1.2 (b)

Vout /(e/2C1)

0.9

0.6 VL /(e/2C1) = 1.4 VL /(e/2C1) = 1.8 0.3

0

VL /(e/2C1) = 2.2

R1 = R2 = RL /30 = Rin /30 = Rout /30

VL /(e/2C1) = 2.6

Cout/5 = C1 = C2

VL /(e/2C1) = 3.0

(e2/2C1)/kT = 1000

0.3

0.6 Vin /(e/2C1)

0.9

1.2

Fig. 2. Transfer characteristic of the (a) capacitive and (b) resistive inverters [7].

without feedback. The transfer characteristics of a twotransistor feedback cascade are given in Fig. 4. It is argued that the resistive circuit has a larger voltage gain and a more stable working point; in addition, it provides reliable input/output isolation. However, its logic swing is smaller than that for the capacitive circuit. The

output signals oscillate because of the stochastic nature of single-electron tunneling. The switching time is 100R1C1. The logic levels become stable in long inverter chains.

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(a) 0.5

0.8 C1 = C2 = Cin /5 = Cout /10

VL /(e/2C1) = 0.3

1)/kT

= 1000 0.6

Vin

0.4

0.1 Vout

Vout /(e/2C1)

Vin /(e/2C1)

0.3

R1 = R2 = RL /10

(e2/2C

–0.1

0.2

–0.3

0

–0.5

–0.2 (b)

1.2

2.0 (e2/2C1)/kT = 1000

R1 = R2 = RL /30 = Rin /30 = Rout /30 C1 = C2 = Cout/5

0.8

VL /(e/2C1) = 2.0

1.6

1.2

Vin /(e/2C1)

0.4 Vout 0

0.8

–0.4

0.4

–0.8

0

500

1000 t/R1C1

1500

Vout /(e/2C1)

Vin

0 2000

Fig. 3. Dynamic characteristics of the (a) capacitive and (b) resistive inverters with a rectangular pulse applied to the input [7].

Fukui et al. [8] suggest a circuit where the one-electron transistor is biased by a tunnel junction rather than by a resistor (Fig. 5). The internal state of this circuit is specified by a charge at points A and B. Stability domains for the circuit in Fig. 5a according to Vin and Vout are depicted in Fig. 6. The shaded regions are instability domains, and the empty triangles with truncated RUSSIAN MICROELECTRONICS

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apexes are domains of Coulomb blockade (in parentheses, the charge states at points A and B are shown). As the input voltage changes, the circuit passes from one stability domain to another, causing a change in the charge state and hence voltage. Figure 7 depicts the transfer characteristic for the circuit in Fig. 5a at different temperatures. The time dependence of the output

138

NEIZVESTNYI et al. 1.5 R2 = R1, R L = 30R1, Rin = 30R1 C2 = 0.2C1, Cout = 30C1

Vout1/(e/2C1), Vout2/(e/2C1)

VL /(e/2C1) = 1.4, (e2/2C1)/kT = 1000

Vout1

1.0

Vout2 0.5

0

0.5

Vin0 /(e/2C1)

1.0

1.5

Fig. 4. Transfer characteristic for a cascade of two resistive inverters [7].

Vdd

Vdd (b)

(a)

Cin

Vout Vin

Cin Vin

Vout

Cout

Cout Vdd

Fig. 5. Single-electron inverters with a tunnel junction in place of (a) source and (b) drain resistors [8]. RUSSIAN MICROELECTRONICS

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SINGLE ELECTRONICS. PART II: APPLICATION OF SINGLE-ELECTRON DEVICES VB, mV 40

20 (0, e)

(0, 0) P

0

–20

(0, –e)

(e, e)

R

(e, 0)

(e, –e)

–40 –400

–200

0 Vin , mV

200

400

Fig. 6. Stable-state domains for the circuit in Fig. 5a [8].

Vout, mV 20

15

T = OK

10

4mK

5

0

–5

–10

–15

2mK

–10

–5

0

5

10

15

Fig. 7. Transfer characteristic of the circuit in Fig. 5a [8]. RUSSIAN MICROELECTRONICS

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20 Vin, mV

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NEIZVESTNYI et al.

Vin, Vout, mV 35 Vin

30

T = OK

25 20 15 10 5

Vout

0 –5

0

20

40

60

80

100 Time, ps

Fig. 8. Time dependence of the input and output voltages with a positive pulse applied to the input [8].

voltage with the input pulse applied is shown in Fig. 8. The output-voltage oscillations observed in the conventional circuit (Fig. 3) here are absent. Such a design is more stable than the conventional one in [7] and is not much more complex.

Cin

V (1) dc

V (2) dc

R

R Cin

Cj

Cj

Vpump

An essentially different construction, based on single-electron tunneling (SET) oscillations (see equation (7) in [6]), was suggested in [9] (Fig. 9). A dc bias volt(n) age V dc (n is the cell number) with a certain phase φclock is applied to each cell (the cells are separated by dashed lines). An ac pump voltage Vpump = Vpcos(2ωst) is simultaneously applied to all the cells (here, ωs is the frequency of the ac input signal Vin = cos(ωst + φin), and φin is the phase differences between the input signal and pump signal. The value of φclock is also taken relative to the pump phase). This system can stay in two stable states because of an uncertain phase relationship between the frequencies ωs and 2ωs. The evaluated diagram for the phase difference between the input and output signals at different φin– φclock relations is shown in Fig. 10. The parameter ε = Cin /Cj characterizes a degree of coupling. For strong coupling (ε = 0.4), the phase difference depends only on the input-signal phase. Note, however, that this diagram is of purely theoretical interest, since practical implementation of a single-electron junction is problematic for the reasons outlined in the theoretical section. In [10, 11], logic and memory cells were made of multitunnel junction (MTJ) devices. These structures are the sole example of the practical implementation the logic single-electron elements described in this section. The physical representation of an MTJ device is shown in Fig. 11. A δ-doped silicon layer was created in a GaAs substrate at a depth of 30 nm by MOCVD. Then, the 120-nm-deep structure shown in this figure was etched on the surface of this layer. Quantum dots in the channel were induced by potential fluctuations. ε = 0.2 Bias-voltage phase φ clock (π/4 units)

140

ε = 0.4

7 6 5 4

3π/2 3π/2

3 2 1

π/2

π/2

0 0 1 2 3 4 5 6 7

0 1 2 3 4 5 6 7

Input- voltage phase φ in (π/4 units) Fig. 9. Logic element based on signal-phase bistability [9].

Fig. 10. Phase diagram for the circuit in Fig. 9 [9]. RUSSIAN MICROELECTRONICS

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150 nm Side gate

δ-doped Si layer

åíJ Electron channel

GaAs substrate Fig. 11. MTJ-based device [10].

15

Writing of “1”

Writing of “0”

Vg

V, mV

VCB = 0

0

Cg

V

Memory cell

–15 15 VCB > 0

C

MTJ V, mV

Cs

0

–15 0

Vol. 28

200

Fig. 13. Timing diagrams for writing “0” and “1” into the single-electron memory cell [10].

Fig. 12. Single-electron memory cell [10]. RUSSIAN MICROELECTRONICS

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NEIZVESTNYI et al. Input cell IN1 V2

–V2

C0

C0

C0

C0 C0

Control cell CS

C0

C0

Output cell OUT

C0

V1 C1

C1

C0

C1

C0

Cj –V1

C1

C0

C0 Central cell

Input cell IN2

C0

C0

V3 C0

C0

C0

C0

–V3

Fig. 14. NAND/NOR gate.

Consider the single-electron memory cell in Fig. 12. When a positive voltage pulse Vg sufficiently large to overcome Coulomb blockade is applied, the capacitor Cg takes charge. Then, when Vg drops to zero, Cg begins to discharge until the discharge process is interrupted by Coulomb blockade. The MTJ will have excessive electrons, and the voltage V will be below zero, remaining close to the Coulomb blockade voltage VCB

(V > –VCB). These conditions correspond to the “0” level. For a negative voltage pulse Vg, the situation is the same, but V is positive and close to the positive value of VCB (V < VCB). The time variation of the voltage across the memory cell upon writing “0” and “1” is shown in Fig. 13. In the upper plot, Coulomb blockade is absent, and the lower plot clearly demonstrates the memory effect with a logic swing of about 6 mV. The RUSSIAN MICROELECTRONICS

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SINGLE ELECTRONICS. PART II: APPLICATION OF SINGLE-ELECTRON DEVICES IN1 2

2

“1”

2

CS

OUT

2

2

2

“1”

“1”

2 IN2 “0” 2

2

Fig. 15. The number of excessive electrons in the cells for NAND operation.

measurements were taken at T = 1.8 K. With the MTJ used as a logic element, the Coulomb blockade conditions were controlled by a side gate. In this case, the device acts as an inverter similar to those described in [7, 8]. 1.0 mm 1.4 mm

Molotkov and Nazin [12] suggested using logic elements that exploit a spin difference upon ferromagnetic and antiferromagnetic interactions of isolated electrons in tunnel-coupled quantum dots. It was shown that the incorporation of “ferromagnetic chains” into a logic array and the application of local permanent magnetic fields to individual quantum dots may significantly improve the truth table for such elements and make possible the fabrication of LSIs based on these elements. Logic elements built around cellular automatons made of Coulomb islands were theoretically studied in [13]. A cell comprises four Coulomb islands forming a ring. The logic elements are various combinations of the cells. It was demonstrated that the Coulomb islands of the cells should be intrinsic semiconductors, i.e., free of conduction electrons, since, in the case of metal islands, a signal in a linear chain of the cells decays even at the fourth cell. For semiconductor islands, the signal does not decay. The cell state (“0” or “1”) depends on the electron distribution over the Coulomb islands within the cells. A NAND/NOR gate is shown in Fig. 14. The gate performs the NAND or NOR function according to the signal at the control input. Figure 15 shows the number of electrons in the cells for the NAND operation. Korotkov [14] proposed single-electron logic using a chain of Coulomb islands subjected to an electric field. The interisland distance in short chains is small, and an electron easily tunnels between the islands if it can overcome Coulomb blockade. This is achieved by applying an external electric field producing a sufficiently large potential difference between the islands. This field makes the electron pass to the end of the chain, i.e., polarizes it. The polarization of one short chain causes the polarization of the adjacent one, although the electrons do not travel between the chains because of the large distance between them. Only

0.2 mm

Width 10 µm Width 50 µm

A

A'

2.0 mm AA'

1 µm-thick silicon nitride

200-nm-thick AuCu meander 200-nm-thick Au substrate

Oxidized Si

Fig. 16. Filter for single-electron devices [17]. RUSSIAN MICROELECTRONICS

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A'

144

NEIZVESTNYI et al.

In [16], a single-electron transistor was suggested to be used as a thermometer. A chain of Al/AlOx /Al tunnel junctions has the minimum of differential conduction, and this minimum sharply depends on temperature. The dynamic ratio Tmax /Tmin is several tens, and the range of measurements, which depends on the junction geometry (capacitance), lies between 0.3–10 K.

Attenuation, dB 80

70

The application of single-electron devices was indirectly touched upon in [17], where miniature noisesuppressing filters for single-electron devices are described. Electromagnetic noise due to high-temperature equipment has an adverse effect on the operation of single-electron devices under cryogenic temperatures and affects Coulomb blockade. The filter shown in Fig. 16 is intended to suppress this influence. The frequency response of this filter is given in Fig. 17. Four filters are necessary to match units operating at 300 K and 30 mK. The problem is to adequately select the temperature of the filters.

60

50

40

30 20

106

107

108

109

1010 1011 Frequency, Hz

Fig. 17. Frequency response of the filter suggested in [17].

a signal can be transferred from chain to chain. Of such chains, structures performing simple logic operations can be constructed. In turn, sophisticated computing structures can be made of these simple logic gates. The signal may be introduced into the chain and derived from the output by means of single-electron transistors. The power consumption for a structure with metal islands of diameter 2 nm on a quartz substrate was estimated. For a typical electric field strength of 4 × 105 V/cm, island density of 1012 cm–2, and clock frequency of 1 GHz, the required power consumption is about 30 W/cm. Today, such logic can be implemented only with a scanning tunnel microscope. In [15], Korotkov et al. used vertically stacked tunnel structures where the tunnel junctions can be spaced closer together than in the planar approach. Speed of single-electron devices (S = a × b, tunnel-junction area; C, junction capacitance; R, resistance; T, operating temperature; and τ, switch time) Parameters

S = a × b, τ = RC, C, aF T, K R, kΩ nm2 ps

Current technology 100 × 100 300 0.15 Short-term forecast 30 × 30 30 1.5 Nanolithography 10 × 10 3 15 limits Molecular level 3×3 0.3 150

30 30 30 30

10 1 0.1 0.01

SPEED OF SINGLE-ELECTRON DEVICES The table summarizes Likharev’s estimates [1] for the speed of single-electron devices of different sizes. Actually, the situation is different. The typical resistance of tunnel contacts is 100 kΩ, and the capacitance of the feed electrodes equals 300 pF. Thus, the operating frequency is as small as 5 kHz [18]. This parameter can be improved, for example, by decreasing the output capacitance. When an HEMT was used as a load in the immediate vicinity of the single-electron transistor, the operating frequency increased to 700 kHz [18], which is still far from the theoretical limit of 10 GHz. It is, however, expected that further technology advances and novel circuit-design approaches will increase the speed of single-electron devices to that predicted theoretically and limited only by the time of electron tunneling. REFERENCES 1. Likharev, K.K., On the Possibility of Fabricating Analog and Digital Integrated Circuits Based on Discrete Single-Electron Tunneling, Mikroelektronika, 1987, vol. 16, no. 3, pp. 195–209. 2. Averin, D.V. and Likharev, K.K., Coherent Oscillations in Small Tunnel Junctions, Zh. Eksp. Teor. Fiz., 1986, vol. 90, no. 2, pp. 733–743. 3. Averin, D.V. and Likharev, K.K., Coulomb Blockade of Single-Electron Tunneling and Coherent Oscillations in Small Tunnel Junctions, J. Low Temp. Phys., 1986, vol. 62, no. 3/4, pp. 345–373. 4. Likharev, K.K., Correlated Discrete Transfer of Single Electrons in Ultrasmall Tunnel Junctions, IBM J. Res. Develop., 1988, no. 1, pp. 144–158. 5. Likharev, K.K. and Claeson, T., Single Electronics, Sci. Am., 1992, no. 6, pp. 80–85. RUSSIAN MICROELECTRONICS

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SINGLE ELECTRONICS. PART II: APPLICATION OF SINGLE-ELECTRON DEVICES 6. Neizvestnyi, I.G., Sokolova, O.V., and Shamiryan, D.G., Single Electronics. Part 1, Mikroelektronika, 1999, vol. 28, no. 1, p. 3. 7. Yoshikawa, N., Ishibashi, H., and Sugahara, M., Dynamic Characteristic of Inverter Circuits Using Single Electron Transistor, Jpn. J. Appl. Phys., 1995, vol. 34, pp. 1332–1338. 8. Fukui, H., Fujishima, M., and Hoh, K., Simple and Stable Single-Electron Logic Utilizing Tunnel-Junction Load, Jpn. J. Appl. Phys., 1995, vol. 34, pp. 1345–1350. 9. Kiehl, R.A. and Ohshima, T., Bistable Locking of Single-Electron Tunneling Elements for Digital Circuitry, Appl. Phys. Lett., 1995, vol. 67, pp. 2494–2496. 10. Nakazato, K. and Ahmed, H., The Multiple-Tunnel Junction and Its Application to Single-Electron Memory and Logic Circuits, Jpn. J. Appl. Phys., 1995, vol. 34, pp. 700–706.

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11. Nakazato, K. and Ahmed, H., Enhancement of Coulomb Blockade in Semiconductor Tunnel Junction, Appl. Phys. Lett., 1995, vol. 66, pp. 3170–3172. 12. Molotkov, S.N. and Nazin, S.S., Single-Electron Spin Quantum Dot Logical Gates with Ferromagnetic Chains, Appl. Phys. Lett., 1991, vol. 63, p. 119. 13. Wu, N.-J., Asahi, N., and Amemiya, Y., Cellular Automaton Circuits Using Single-Electron Tunneling Junctions, Jpn. J. Appl. Phys., 1997, vol. 36, pp. 2621–2627. 14. Appl. Phys. Lett., 1995, vol. 67, p. 2412. 15. Appl. Phys. Lett., 1996, vol. 67. p. 20. 16. Appl. Phys. Lett., 1995, vol. 67, p. 2096. 17. Vion, D., Orfilla, P.F., Joyez, P., Esteve, D., and Devoret, M.H., Miniature Electrical Filters for Single Electron Devices, J. Appl. Phys., 1995, vol. 77, pp. 2519–2524.