JOURNAL OF APPLIED PHYSICS 100, 044515 共2006兲
Numerical and experimental characterization of 4H-silicon carbide lateral metal-oxide-semiconductor field-effect transistor Siddharth Potbhare,a兲 Neil Goldsman,b兲 and Gary Pennington Department of Electrical and Computer Engineering, University of Maryland, College Park, Maryland 20742
Aivars Lelis U.S. Army Research Laboratory, 2800 Powder Mill Road, Adelphi, Maryland 20783
James M. McGarrity Berkeley Research Association, Springfield, Virginia 22150
共Received 21 March 2006; accepted 12 July 2006; published online 31 August 2006兲 Combined simulation and experimental analyses are performed to characterize the 4H-silicon carbide 共SiC兲 lateral metal-oxide-semiconductor field-effect transistor 共MOSFET兲. Using a quasi-two-dimensional depth dependent Coulomb mobility model for scattering due to interface and oxide charge, along with existing models for other scattering mechanisms, and an in-house drift diffusion device simulator tailored for SiC MOSFETs, we have extracted values for interface trap density of states for 4H-SiC MOSFETs. Characterization shows that the interface trapped charge in 4H-SiC MOSFETs is responsible for mobility degradation and reduction in mobile inversion charge, and therefore reduced current. Its effect on mobility degradation decreases at higher gate voltages due to increased screening. Our results show that at high gate voltages, surface roughness plays the major role in surface mobility degradation in 4H-SiC MOSFETs. Results indicate that due to high Coulomb scattering near the interface, current density is maximum a few nanometers away from the surface. The model indicates overall mobility values of approximately 20 cm2 / V s at the interface, and increasing to approximately 250 cm2 / V s near the bottom of the inversion layer. Simulations predict that tenfold reduction in interface and fixed oxide charge density would give rise to very favorable device characteristics. © 2006 American Institute of Physics. 关DOI: 10.1063/1.2335967兴 I. INTRODUCTION
The properties of SiC, including its large band gap, high thermal conductivity, high breakdown electric field, and ability to grow natural oxide, have enabled manufacturers to fabricate SiC metal-oxide-semiconductor field-effect transistors 共MOSFETs兲 and project them as devices capable of working in high power, high temperature environments. Currently, the biggest challenge in the development of SiC devices is low surface mobility1 caused by excessive scattering of mobile charges at the silicon carbide 共SiC兲-Silicon Dioxide 共SiO2兲 interface. Extremely large densities of occupied interface traps at the SiC – SiO2 interface2–4 give rise to a large amount of Coulombic scattering, causing mobility degradation. Using mobility modeling, device simulation, and terminal I-V characteristics, we have extracted the density of states profile for the interface traps in 4H-SiC MOSFETs. We have also obtained values for the trapped charge versus mobile charge, mobility versus depth, current density versus depth, and the relative importance of surface roughness versus Coulombic interface charge scattering. We have modeled the physical phenomenon of scattering of mobile charges in the inversion layer of a MOSFET device in detail by developing a robust mobility model for 4H-SiC devices. The mobility model includes the effects of a兲
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b兲
0021-8979/2006/100共4兲/044515/8/$23.00
scattering of mobile charges in the inversion layer due to Coulombic interaction with occupied interface traps and fixed oxide charges, surface roughness, bulk phonons, and surface phonons. The Coulomb scattering mechanism is very important for SiC MOSFETs, owing to the extremely large densities of occupied traps found in devices with a SiC -SiO2 interface. Our Coulomb scattering mobility model takes into account a distribution of oxide charges inside the oxide, distribution of mobile charges inside the inversion layer, screening, temperature dependence of the occupied trap density, and variation of occupied interface trap density along the channel in the MOSFET. The Coulomb mobility model has enabled us to extract physical details of the interface region. The I-V curves we obtain from our device simulations are compared with experimentally measured data. By fitting the simulated curves to the experimental data, we can extract various parameters, including the fixed oxide charge density and the interface trap density of states profile. Our device simulator is a comprehensive drift-diffusion-based computer-aided design 共CAD兲 tool that we have designed specifically for the simulation of SiC devices. We can extract details of device behavior, relative importance of scattering phenomena, details of inversion layer physics, distribution of current inside the MOSFET channel, variation of mobility with depth away from the interface, and other physics-based properties inside the device. Predictions as to the future enhancement of device performance are provided based on hypothetical improvement of the interface.
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© 2006 American Institute of Physics
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II. MOBILITY MODELING
TABLE I. Model parameter values for 4H-SiC obtained from literature, by calculation, and by correlating simulations with experiments.
To characterize real mobility in a 4H-SiC MOSFET, we begin by writing detailed physics-based mobility models that reflect the various scattering phenomena in the device. The total low field mobility 共LF兲 at each point in the device is calculated by considering the bulk phonon mobility 共B兲, surface phonon mobility 共SP兲, surface roughness mobility 共SR兲, and Coulomb mobility 共C兲. The effect of high lateral field on the scattering of charged carriers in the inversion layer is modeled by considering a high field mobility component 共HF兲. The total mobility is obtained by summing all these mobilities using Matthiessen’s rule 1
TOTAL
=
1 1 1 1 1 1 1 + = + + + + . LF HF B SP SR C HF 共1兲
Coulomb scattering mobility component. Under most operating conditions, channel mobility in SiC MOSFETs is most affected by Coulomb scattering due to interface traps and fixed oxide charges. We have extended previous work,5–11 by formulating the problem of Coulombic scattering due to trapped interface charge as a quasi-twodimensional 共quasi-2D兲 phenomenon, that includes a dependence of mobility on distance between scattering charge center and inversion layer mobile charge. Our revised mobility model12 is suitable for any distribution of mobile charges in the inversion layer, any distribution of fixed charges inside the oxide, and any variation of occupied trap density along the SiC-SiO2 interface of the MOSFET. Here we give the final mobility expression derived using our model and use it to characterize the device. Detailed derivation of our Coulomb scattering mobility model can be found elsewhere.12 The Coulomb mobility for a mobile charge at a depth z inside the semiconductor, due to scattering by occupied traps 共Nit兲 and fixed charges 共N f 兲 located at the interface and at a temperature T, is given by12 m q 共N f + Nit兲 1 = F, C共z,T兲 16¯2បkBT
Parameters
max 共cm2 / V s兲a Nref 共cm−3兲a
Bb ␥ Bb bulk 共g / cm3兲a
vs 共cm/s兲a Dac 共eV兲a,c,d m1, m2, m3 共for electrons兲e m*, mc, m⬜ 共for electrons兲 A 共cm/s兲 B 关共V / cm兲−2/3 K 共cm/ s兲兴 vsat 共cm/s兲
where q is the electronic charge, m* is the density of states effective mass, ប is Planck’s constant, kB is Boltzmann’s constant, ¯ is the average of the permittivity of 4H-SiC and SiO2, and F is the form factor giving the depth dependence of Coulomb mobility.
冕 冋 /2
F共z兲 =
␣=0
1−
2 sc 2 共8m*kBT/ប2兲sin2 ␣ + sc
册
2 ⫻exp兵− 2冑关共8m*kBT/ប2兲sin2 ␣ + sc 兴z其d␣ ,
Reference 19. Reference 18. c Reference 20. d Reference 21. e Reference 22. b
will be larger, implying more screening. This manifests itself as a reduction in the form factor F and thereby increases the Coulomb mobility at all depths z inside the MOSFET. Based on our previous work,13 and the work of others,8,14–17 the various other mobility components implemented in our device simulator are as follows. Bulk mobility component.13,14
B =
max共300/T兲B , 1 + 共D/Nref兲␥B
冑
q2Ninv , SiCZavkBT
共5兲
where T is the lattice temperature, D is the doping density, max is the maximum mobility in the bulk, and Nref, B, and ␥B are empirical parameters obtained from experiment. Surface phonon mobility component.8,13,15
SP =
A B + 1/3 , E⬜ TE⬜
共6兲
where E⬜ is the component of the electric field perpendicular to the interface. A and B are parameters evaluated using theory and experiment. Surface roughness mobility component.13,16,17
SR =
⌫SR 2 , E⬜
共7兲
here ⌫SR is a parameter that depends on the roughness of the SiC-SiO2 interface. High field mobility component.13 共3兲
where sc is the inverse of the screening length and it describes the screening of the scattering charges by the mobile charges in the inversion layer. ␣ is the scattering angle.
sc =
1071.0 1.7⫻ 1019 2.4 0.40 3.2 1.37⫻ 106 20.5 0.29, 0.58, 0.33 0.41, 0.39, 0.41 7.8243⫻ 107 9.9240⫻ 106 1 ⫻ 106
a
* 3
共2兲
Values
共4兲
where Ninv is the inversion layer charge density, and Zav is the average depth of the inversion layer. For larger Ninv, sc
HF =
vsat , E储
共8兲
where vsat is the saturation velocity of the mobile charge, and E储 is the component of electric field parallel to the interface. For low field and long channel MOSFET simulations, the saturation velocity plays a very minor role so its precise value does not affect the results obtained in this paper. Table I lists the values for the various parameters that have been either taken from literature or calculated theoretically.
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III. SIMULATION TECHNIQUE AND APPLICATION TO 4H SIC MOSFETS A. Formulation of occupied interface trapped charge density model
One of the main goals of this work is to extract the energy dependent density of states profile for interface traps in 4H-SiC MOSFETs. We achieve this by formulating a density of states model and then comparing simulations to experimental I-V data to obtain the parameters of this model. Experimental measurements of interface trap density of states 共Dit兲 for 4H-SiC have shown a flat distribution in the middle of the band gap and an exponential increase near the band edges.2–4 We use a similar distribution function for the interface trap density of states and extract the values for midgap 共Ditmid兲 and band-edge 共Ditedge兲 values of the density of states by comparing simulated I-V curves to experimental data. The density of states for interface trap states lying in the upper half of the 4H-SiC band gap can be approximated as13
冉 冊
Dit共E兲 = Ditmid + Ditedge exp
E − Ec , it
共9兲
where E is the energy, Ec is the energy of the conduction band edge, and it determines the shape of the Dit-E curve. The density of occupied acceptor-like interface traps is given by Nit =
冕
Ec
Dit共E兲f n共E兲dE,
共10兲
Eneutral
where f n共E兲 is the probability density function describing the occupancy of the traps,13 and Eneutral is the energy at the neutrality point. We have used midgap neutrality 共Eneutral = 1.63 eV at room temperature兲 in our simulations. Interface traps lying above midgap are acceptor type while those lying below midgap are donor type. This may not be strictly true because the neutrality point is not well defined for SiC -SiO2 interface traps. Our simulations show that if the neutrality point is more towards the conduction band edge, the extracted density of states value for the interface traps would need to be only slightly higher in order to compensate for the decrease in midband acceptor-like states. B. Initial estimate of the fixed oxide charge
We use a two step strategy to estimate the amount of fixed oxide charge in a 4H-SiC MOSFET. An initial estimate of the fixed oxide charge density in a MOSFET can be obtained by comparing simple analytical models and experiment for threshold voltage variation with temperature. The second step involves using this initial estimate in our device simulator and obtaining a more accurate value by comparing simulation and experiment. With variation in temperature, there is change in inversion layer charge density, depletion charge density, and occupied interface trap density. However, the effect on fixed oxide charge, by change in temperature, is negligible. We have measured the threshold voltage for a 4H-SiC MOSFET at temperatures ranging from 25 ° C to 225 ° C by extrapo-
FIG. 1. Analytically calculated and experimentally measured threshold voltages at different temperatures for a 4H-SiC MOSFET.
lating the 冑ID vs VGS curve at each temperature and taking the X-axis intercept as the threshold voltage. By comparing experiment and simple MOS theory, we can estimate the fixed charge. First, we write the analytical textbook-type equation for temperature dependent threshold voltage in the absence of trapped charge and fixed oxide charge as23 Vtanalytical共T兲 = ⌽MS共T兲 + 2B共T兲 +
冑2SiCqNA关2B共T兲兴 Cox
,
共11兲 where ⌽MS is the work function difference between the polysilicon gate and 4H-SiC substrate, B is the bulk built in potential, NA is the bulk doping, and Cox is the oxide capacitance. 共This equation assumes that there is no inversion charge at threshold, and that the band bending at the surface is twice the bulk built-in potential.兲 Figure 1 shows the measured and analytical temperature dependent threshold voltages. Notice that the measured threshold voltage is lower than the analytical threshold voltage, indicating that there is a net positive charge present at the interface at threshold. The measured threshold voltage will be the analytical threshold voltage plus a shift due to the occupied traps and fixed oxide charge. The difference between the analytical threshold voltage and the measured threshold voltage will therefore give us a measure of the fixed oxide charge and the trapped charge. N f − Nit共T兲 =
Cox 关Vtanalytical共T兲 − Vtmeasured共T兲兴, q
共12兲
here Nit is the temperature dependent occupied interface trap density at threshold and N f is the fixed oxide charge density. As the mobile charges gain more energy with an increase in temperature, they are trapped less. So, the occupied trap density Nit decreases with an increase in temperature. Fixed oxide charge N f , on the other hand, remains constant. Hence, plotting the difference 共N f − Nit兲 as a function of temperature 共Fig. 2兲, we can estimate the value of N f as the maximum of the curve 共where Nit is the minimum兲. The estimated value of N f for the device was 5.8⫻ 1011 cm−2. While this method gives insight for fixed charge densities, it is likely to provide less fixed charge than is actually
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FIG. 2. 共Color online兲 关N f − Nit共T兲兴 calculated using Eq. 共12兲 and extrapolated to get an estimate of the fixed charge 共N f 兲.
present. This underestimate can be attributed to two basic phenomena: 共i兲 occupied trap density Nit is unlikely to be zero at the maximum point on the curve 共at T = 225 ° C兲 and 共ii兲 the textbook assumption of zero inversion charge at threshold is not completely valid. Therefore, the fixed charge density N f will be larger than the calculated value of 5.8 ⫻ 1011 cm−2. This method actually indicates a lower limit for the fixed charge density. We improve upon this and get a more accurate value of N f by performing full 2D device simulation and comparing the simulated subthreshold current region and the threshold voltage with experiment. This is described later in the paper. IV. RESULTS AND DISCUSSION
To extract various material parameters for 4H-SiC MOSFETs, we use a strategy of comparing our simulated I -V curves to experimentally measured data. Different parts of the I-V curves can be used to determine various material parameters. The 4H-SiC MOSFET being simulated has a width of 440 m and a gate length of 10 m. It has an epilayer with p-type doping of 5 ⫻ 1015 cm−3 and a p-type polysilicon gate.
J. Appl. Phys. 100, 044515 共2006兲
FIG. 3. ID vs VGS characteristics on a log scale showing the comparison between simulation and experiment in the subthreshold region at room temperature. VDS = 0.25 V.
B. Extracting the interface trap density of states and fixed charge
In the subthreshold and near-threshold regions of n-MOSFET operation, the electron Fermi level is closer to the center of the band gap. Because of this, the interface traps in the midgap region of the 4H-SiC band gap become occupied. Therefore, comparison of the simulated subthreshold and near-threshold ID-VGS characteristics of the device with experimental data gives us an estimate of the midgap density of states of the interface traps. Also, an accurate match of the simulated and measured subthreshold currents and threshold voltages gives us the value for the fixed oxide charge. Above threshold, in deep inversion, the electron Fermi energy is closer to the conduction band edge, causing traps at energies closer to the band edge to be occupied. Hence, we can extract the density of states of traps near the band edge by comparing the simulated and measured ID -VGS characteristics in the linear region. Figure 5 shows the extracted interface trap density of states profile for the test 4H-SiC MOSFET. This is comparable to a few experimentally measured values reported in
A. Low field terminal I-V characteristics
In Fig. 3, we show the simulated and experimentally obtained ID-VGS curves for a 4H-SiC MOSFET plotted on a log scale. The drain-source voltage VDS is 0.25 V. Our model gives us excellent agreement with experiment in the subthreshold and linear regions. Agreement in the subthreshold region enables us to extract the fixed oxide charge and the midgap interface trap density of states for the device. Figure 4 shows the excellent agreement of the simulated and measured ID-VGS characteristics in the linear region of operation. Fitting the near-threshold part of the curve to experimental data gives us values for the density of states near the band edges for interface traps. The high gate voltage part of the curve allows us to extract values for the surface roughness scattering parameters.
FIG. 4. ID vs VGS characteristics on a linear scale showing the comparison between simulation and experiment in the linear region at room temperature. VDS = 0.25 V.
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FIG. 5. Interface trap density of states profile extracted by comparing simulated ID-VGS characteristics to experimental measurement.
FIG. 6. Comparison of the mobile inversion charge density and occupied interface trap density at different gate voltages at room temperature.
literature.2–4 Table II gives the extracted parameter values for the interface trap density model and the fixed oxide charge density value for the simulated device. As we had explained earlier, the value for the fixed charge, obtained here with a more comprehensive device model, is larger, and we believe more accurate, than the one we had estimated above using a simple analytical threshold voltage model.
26 cm2 / V s. The highest values at the surface are generally for the lowest gate voltages. Due to the screening of trapped charges by inversion electrons, mobility tends to become greater for higher voltages at distances more than a nanometer from the interface. Overall, as we move away from the interface toward the bottom of the inversion layer, mobility tends to increase to values of approximately 250 cm2 / V s. Figure 8 shows the current density at the center of the channel plotted as a function of depth into the MOSFET. The peak of the current density curve is seen at a depth of around 2 nm for a gate voltage of 14 V. We get a mobility of about 75 cm2 / V s at this depth. At low gate voltages, the current is spread deeper inside the MOSFET. With an increase in gate voltage, as the electrons are pulled closer to the interface, we see the peak of the current density curve shift towards the interface.
C. Trapped charge versus mobile charge
Figure 6 shows the extracted values for the occupied interface trap density and the inversion layer mobile charge density as a function of gate voltage. The curves show that the density of occupied traps is much higher than the inversion charge density. This means that most of the charge induced in the semiconductor during inversion gets trapped. Less than 30% of the induced charge is available for conduction, thus giving less current in 4H-SiC MOSFETs. Significant improvement in current is expected due to an increase in mobile charge if the number of interface trap states is reduced. D. Flow of current and mobility inside the MOSFET
Our simulations show a very interesting phenomenon regarding current flow in a 4H-SiC MOSFET. Because of the large amount of Coulomb scattering taking place at the 4H -SiC / SiO2 interface, the surface mobility is less than 30 cm2 / V s. The mobility increases very rapidly with depth, and as a result, most of the current actually flows some distance away from the interface. Figure 7 shows the mobility as a function of depth into the device. We see that at the interface, mobility has values in the region between 12 and
E. Comparing different mobility components
Here we compare the two main mobility degradation mechanisms in 4H-SiC MOSFETs, namely, Coulomb scattering and surface roughness scattering, under two different bias conditions. Figures 9 and 10 show comparisons between Coulomb scattering mobility and surface roughness mobility
TABLE II. Extracted interface trap density of states parameters and fixed oxide charge density. Parameters Ditmid 共cm−2 eV−1兲 Ditedge 共cm−2 eV−1兲 it 共eV兲 N f 共cm−2兲
Values 2.3⫻ 1011 6 ⫻ 1013 0.061 1.30⫻ 1012
FIG. 7. 共Color online兲 Total mobility vs depth at different gate biases. VDS = 0.25 V and T = 25 ° C. Inset shows the mobility near the surface at different gate biases.
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FIG. 8. Figure showing current density variation with depth for a 4H-SiC MOSFET at room temperature. The current density is at the center of the channel and plotted as distance into the device.
variation with depths at VGS = 2 V and VGS = 12 V, respectively. To obtain these data, we have taken a vertical cross section into the device, halfway between the source and drain. Furthermore, recall that the mechanism that is dominant will be the one that provides the most scattering and lowest mobility. At low gate voltages, there is much less inversion charge, but significant amount of occupied traps. This results in very little screening and very large amount of Coulombic scattering of the mobile charges by occupied traps and fixed oxide charges. Therefore, Coulomb scattering becomes the dominant mobility degradation mechanism. Thus, the total mobility curve follows the Coulomb mobility 共C兲 curve at low gate voltage 共Fig. 9兲. Coulomb mobility becomes greater, and hence less of a determining factor, than surface roughness mobility at a depth of approximately 4.5 nm. The transition point after which Coulomb scattering mobility is no longer dominant is shown by a vertical line in the figure. At higher gate voltages, the inversion charge is quite large, and hence it effectively screens the occupied traps and the fixed oxide charge. This causes a reduction in the amount of Coulomb scattering, and surface roughness becomes the dominant scattering mechanism. The total mobility curve now follows the surface roughness mobility 共SR兲 curve for
J. Appl. Phys. 100, 044515 共2006兲
FIG. 10. 共Color online兲 Comparison between various mobilities at high gate voltage and at room temperature. Coulomb scattering is the dominant scattering mechanism at this voltage only very close to the interface. Total mobility is controlled by surface roughness scattering.
most of the depth 共Fig. 10兲. Very near the interface, Coulomb scattering is still the dominant mechanism. But, as indicated by the vertical line in the figure, the Coulomb mobility curve crosses the surface roughness mobility curve at a depth of 1 nm, becoming less important very quickly with distance from the surface. The surface roughness parameters for the MOSFET have been extracted by comparing the high voltage regions of the simulated and experimental I-V curves. We obtain a value for the surface roughness scattering parameter ⌫SR for the test MOSFET as 3.5⫻ 1012 V / s. This is significantly lower than the values for silicon 共Si兲 MOSFETs, indicating that the surface of the 4H-SiC MOSFET is very rough as compared to Si MOSFETs. The current density curves at those particular gate voltages are also plotted on the same figure. We can see that for low gate voltages, at the location of peak current density, the Coulomb scattering mobility is the dominant mobility 共Fig. 9兲. And, at high gate voltages, the surface roughness mobility is dominant at the location of peak current density 共Fig. 10兲. Lastly, comparing the Coulomb mobility curves of the two figures, it is clearly seen that the Coulomb mobility rises much more sharply with depth in the case of higher gate voltage 共Fig. 10兲. This is due to the fact that at higher gate voltages, there is much more inversion charge, which effectively screens the occupied interface traps and the fixed oxide charges. So, the decrease in the Coulombic scattering rate with distance is much more pronounced at higher gate voltages. This translates into a much sharper rise in Coulomb mobility with distance at higher gate voltages. F. Performance improvement in 4H-SiC MOSFETs
FIG. 9. 共Color online兲 Comparison between various mobilities at low gate voltage and at room temperature. Coulomb scattering is the dominant scattering mechanism at this voltage.
We now show the projected improvement in performance of 4H-SiC MOSFETs that can be achieved by improving the 4H-SiC / SiO2 interface. Figure 11 shows the improvement in current that can be achieved if the interface trap density of states for the test device is reduced. A reduction in trap density of states by a factor of 10 gives substantial improvement in current at low gate voltages. The improvement in current is caused by an increase in inversion charge and an increase in surface mobility due to reduced
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FIG. 11. 共Color online兲 Current improvement predicted for the test MOSFET device on reduction in interface trap density of states.
Coulombic scattering. Further reduction in interface states does not show much current improvement. While transconductance near threshold shows significant improvement, we also see that the MOSFET operates as a depletion mode device. This is due to the significant amount of fixed positive oxide charge. In Fig. 12, we show that the device performance would be improved if both fixed oxide and trapped interface charge were reduced by a factor of 10. The figure shows improved transconductance near threshold, as well as a positive threshold voltage providing the typically desired enhancement mode operation. Also interesting is that at higher gate voltages, the transconductance is not improved substantially because the mobility is controlled by surface roughness, and not Coulombic scattering. Figure 13 shows the current improvement on the reduction of surface roughness, while holding interface and fixed oxide charge unchanged from the extracted values. Notice that the improvement is significant at higher gate voltages where surface roughness mobility is dominant, and not near or below threshold where Coulomb mobility dominates.
FIG. 12. 共Color online兲 Performance improvement in transconductance and enhancement mode operation obtained on reduction of trap density of states and fixed oxide charge. VDS = 0.25 V and T = 25 ° C.
FIG. 13. 共Color online兲 Improvement in current in the test 4H-SiC MOSFET on reduction in surface roughness.
V. CONCLUSION
Room temperature mobility modeling and device simulations for a 440⫻ 10 m2 4H-SiC lateral MOSFET have been presented. Simulated I-V curves have been compared to experiment and appear to validate that the mobility and other physical models represent the physics of 4H-SiC MOSFETs. Fixed oxide charge density has been calculated using temperature dependence of threshold voltage, and comparison of simulated and experimental I-V data. We take advantage of a robust quasi-2D Coulomb scattering mobility model that has been developed and implemented for SiC MOSFETs to extract interface physics. Interface trap density of states profile for 4H-SiC MOSFET has been extracted and it appears to be in agreement with experimental measurements reported in literature. Extracted results show that 4H-SiC MOSFETs have very high density of occupied traps. This causes a significant reduction in current by reducing the surface mobility and by reduction in mobile charge available for conduction. Coulomb scattering by occupied interface traps and fixed oxide charges is the dominant scattering mechanism at room temperature in 4H-SiC MOSFETs close to the SiC – SiO2 interface. Screening of occupied traps and fixed charges by inversion layer mobile charges at high gate voltages reduces the amount of Coulomb scattering, resulting in increased importance of surface roughness scattering at high gate biases. Current density is maximum inside the semiconductor at a distance of approximately 2 nm from the interface. This is due to very low surface mobilities resulting from excessive Coulomb scattering from occupied traps and fixed charges in 4H-SiC MOSFETs. Mobility at the surface is around 10– 30 cm2 / V s at room temperature. Reduction in interface trap density of states gives a substantial current improvement in the subthreshold and near-threshold regions, whereas a reduction in surface roughness improves the device performance at high gate voltages. A combination of the two should give good device performance over the whole range of gate biases. Furthermore, reduction in fixed charge, in conjunction with a decrease in trap densities, should provide improved transconductance and maintain enhancement mode operation.
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ACKNOWLEDGMENTS
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J. Appl. Phys. 100, 044515 共2006兲
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