Localized DNA Circuit Design with Majority Gates Jinwook Jung and Youngsoo Shin Department of Electrical Engineering, KAIST, Daejeon 34141, Korea [email protected], [email protected] Abstract—There have been many research efforts on the development of molecular DNA circuits, mainly for biomedical applications. Spatially localized DNA circuit, in particular, is considered as a most promising approach because of its fast and robust operations. In the localized DNA circuits, it is important to minimize circuit sizes due to high manufacturing cost of the special molecular board that is used to attach DNA logic gates. A localized DNA majority gate is proposed in this paper to exploit the compact logic representation of majority logic, thereby achieving smaller circuit footprint. A gate version selection algorithm is presented to address how DNA molecules have to be arranged in order to ensure correct functionality.

I. I NTRODUCTION Molecular DNA circuits can operate reliably within cellular environment, and so they are able to directly interact with living cells. Such DNA-based biomolecular devices can serve as foundations for a variety of future biomedical applications, including smart therapeutics, targeted drug carriers, and autonomous DNA nanorobots [1]–[3]. In this regard, many research efforts have been conducted on the development of molecular logic gates using DNA and their application to digital circuit design. Several DNA logic gates have been proposed [2]–[5], which can be categorized into global and local. Global DNA gates float in a solution relying on diffusion to interact with other gates [4]. The reaction rate is very low as DNA molecules freely move in a solution so that circuit operations typically take several hours [3]. In localized DNA circuits, which are of our interest in this paper, DNA gates are attached to a special molecular board so higher reaction rate and faster operation (e.g. several minutes) can be achieved [4]. In addition, localized DNA circuits are typically more robust since the spatial localization reduces interference among gates. To construct a DNA board used in the localized DNA circuits, a synthetic DNA structure called DNA origami is used. About 200 DNA molecules can be integrated on a typical DNA origami board [5]. Even though several DNA origamis can be stitched up to construct a large DNA board, it is important to minimize the number of DNA origamis because of their manufacturing cost; a single-stranded DNA, M13mp18, whose cost is more than $15k per nmol is necessary to build a DNA origami [6]. This motivates us to make DNA circuits as compact as possible, since it naturally reduces the size of the necessary DNA boards. In this paper, we propose a localized DNA majority gate which implements a ternary majority function. The expressive power of majority gate allows us to implement a Boolean function in more compact form. An algorithm, with linear

Domain

a

b GTACTATCGATTGCCTTGCATC

Binding

Toehold CATGATAGCTAACGGAACGTAG

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Fig. 1. DNA structure with toeholds. Input a

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Fig. 2. DNA strand displacement.

time complexity, for gate size selection to guarantee correct operation is also proposed. Experimental results demonstrate that the circuit size can be reduced by 12.8% on average, compared to the conventional localized DNA circuits without use of majority gates. II. P RELIMINARIES A. DNA Strand Displacement Fig. 1 shows a DNA structure, in which a strand of DNA is made from 4 base nucleotides A, T, C and G. A sequence of the bases is called a domain, e.g. domain a is made of CGATGT. Binding arises only between A and C, and between T and G; the complementary domain whose bases can bind with those of the other domain is denoted using ⇤, e.g. b⇤ in Fig. 1. A single strand attached at a double strand is named as toehold. A key mechanism that realizes DNA circuits is the strand displacement [7]. Suppose that a strand of domain a–b is given as an input to a DNA structure with a toehold of a⇤ , as shown in Fig. 2. Once a and a⇤ bind, the input strand displaces the strand b–c and fully binds with the DNA structure. As a result, the strand b–c is released as an output, which can be used to initiate subsequent strand displacement. B. Localized DNA Circuit 1) Hairpin and Origami: The basic building block of localized DNA circuits is hairpin. Fig. 3 shows a hairpin structure and its strand displacement process, where an input strand is called a fuel. Output of the strand displacement is a strand y–b, a part of the hairpin, which is a prime difference of the general strand displacement process of Fig. 2. A special DNA structure called DNA origami [6] is used as a circuit board to place hairpins. It is constructed via a self-assembly process, depicted in Fig. 4, using a long strand (called scaffold) with multiple short strands (called staples).

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Fig. 5. (a) AND gate, (b) OR gate.

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Fig. 3. Strand displacement in a hairpin.

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Fig. 4. DNA origami.

Each staple has a specific domain complementary to a certain part of the scaffold so that it is attached to the desired locations of the scaffold thereby folding it into a desired pattern. As such, we can create complex and large DNA structures. By combining hairpin structures with the staple strands, hairpins can be located on desired positions of a origami board. If a hairpin binds with an input fuel (given as a floating single strand), it exposes its loop domain. The exposed loop is not detached from the origami, and can only interact with adjacent hairpins. This feature can be used to isolate information, thus the hairpin is widely used to compose DNA gates [4]. 2) DNA Gates: A few hairpins can be configured on an origami to implement Boolean AND and OR gates [5]. Fig. 5(a) shows an AND gate consisting of four hairpins: two for the inputs, one for the output, and one for a special function called threshold. If only one input fuel arrives, it combines with the corresponding input hairpin; they are then subsequently combined with the threshold, since it is located closer to the inputs than to the output. If two input fuels are given, they combine with respective input hairpins; one input hairpin binds with the threshold, and the other subsequently binds with the output exposing the output strand. An OR gate is implemented with two input and one output hairpins as shown in Fig. 5(b). Two input hairpins transfer DNA signal to the output via a similar process in the AND gate; the only difference is the absence of the threshold hairpin. If one of the inputs exposes its loop, the toehold of the output is combined with the loop. The loop of the output is then exposed, which serves as the output signal of the gate. 3) Circuit Design and Operation: There is no NOT gate for DNA circuits as logic values are represented by the existence of DNA strand; it cannot be distinguished if a strand exists or not due to asynchronous operations. Thus, DNA circuits have to be synthesized in a dual-rail fashion to realize signal inversion [8]. The operations of DNA circuits are carried out on a molar basis, typically on the order of 102 nmol. Billions of identical DNA circuits operate simultaneously, and generate output strands. Circuit output is identified by the relative concentration of the output strands. If the concentration is low

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Fig. 6. (a) Localized DNA majority gate, (b) DSD simulation result of the operation of the gate.

(high), the logic value is interpreted as 0 (1). C. Majority Logic Circuits Majority logic consists of three-input majority gates and inverters; the majority gate of Boolean variables A0 , A1 and A2 is denoted as M(A0 , A1 , A2 ), and generates true if and only if at least two of the three variables are true. A majority gate behaves as an AND (OR) gate when one input of the operator is fixed to 0 (1). It is shown by a theoretical study [9] that majority logic circuits are much smaller than the one based on traditional Boolean logic with AND and OR gates. III. L OCALIZED DNA M AJORITY G ATE We develop a localized DNA majority gate to leverage the compact representation of majority logic for reducing a circuit area. Fig. 6(a) shows the proposed majority gate consisting of three input hairpins (A0 , A1 , and A2 ) and one output (Y ) along with a threshold (Th). When the loop of an input hairpin is opened, it is combined with the threshold; the output hairpin does not open resulting the output 0. Once one more input hairpin is opened, the output hairpin is then opened so that the output becomes 1. With the proposed majority logic gate, the localized DNA circuit can now be designed as follows. Given a circuit description, we first replace all the AND and OR gates with the majority gate by fixing one of the inputs as 1 or 0. We then optimize the majority circuit using a majority logic optimizer tool such as [10]. The optimized majority circuit may contain majority gates with one inputs fixed to value 1 or 0; they are replaced again to the AND and OR gates shown in Fig. 5. A. Validation The localized majority gate was modeled in the DNA Strand Displacement (DSD) language, and simulated with the Visual DSD simulator [11]. We assumed 100nmol of initial localized majority gates; the fuel and input strands were assumed to be of 10⇥ concentrations of the majority gates. All the possible

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Fig. 7. Localized majority gates of (a) size 2 and (b) size 3. (c) Correct output probability with respect to gate sizes.

input states for the majority gate from (0, 0, 0) to (1, 1, 1) were simulated, by giving corresponding input strands. The reaction rate for strand displacement and the local concentration parameter were adopted from [12], which are 0.91 µmol 1 s 1 and 103 nmol, respectively. Fig. 6(b) shows the simulation results. When more than 2 input strands are given, almost all the majority gates generate output strands (the plot of red circles in Fig. 6(b)). On the other hand, only a small portion of the majority gates generates output strands if only one input is given (blue and gray circles in Fig. 6(b)); the relative concentrations for those cases are small enough so that the results are interpreted as logical 0. IV. G ATE S IZING When an input fuel is given for a majority gate shown in Fig. 6(a), the output may be asserted with a non-zero probability. Since the binding rate between two localized hairpins is inversely proportional to the square of their distances [11], the correct output probability p that an input hairpin combines 2 o with the threshold over the output is computed as p = d 2 d+d 2, o th where dth and do are the distances from the input to the threshold and output, respectively. The stochastic nature of the operations in the majority gates can result in spurious circuit outputs. Some amount of spurious output of a DNA circuit can be eliminated using a special global DNA gate, determining the maximum tolerable error ratio R of a circuit [2], [3]. Meanwhile, input and threshold hairpins are located in the minimum pitch for the sake of small footprint (see Fig. 6(a)). In this regard, the correct output probability p is determined by how far the output is located from the threshold. Two shapes of the majority gate with different relative locations of the output, thus the values of p, are shown in Fig. 7(a) and (b); we define the size of the gate as the distance between the farthest input and the output. A. Problem Statement Our objective is to determine the gate size of every majority gate, given a maximum tolerable error ratio while making the entire circuit as compact as possible. In fact, a similar problem arises also for the localized AND gates, which were covered in a previous work [8]. We state the gate sizing of majority DNA circuit based on the gate sizing problem formulation of [8]: Given a localized DNA majority circuit G = (V, E) and the maximum tolerable error ratio R, the gate sizing problem is to determine the correct output probability p of every v 2 V , such that ’vi 2P pi is larger than 1 R while minimizing Âvi 2P pi for every path P in G.

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Fig. 8. Example of the proposed gate sizing algorithm. Topological orderings of (a) the reverse graph and (b) the original graph.

L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11

Algorithm Gate Sizing(V, E) Y topological ordering of V in reverse of G foreach v in reverse order of Y do if f anin(v) ⇢ {PIs} then x(v) 1/level(v), c(v) else Assign Probability(v) F topological ordering of V in G foreach v in reverse order of F do if f anin(v) ⇢ {POs} then c(v) x(v) else Assign Probability(v) 8v 2 V , p(v) (1 R)x(v)

x(v)

Function Assign Probability(v) C max{c(vi ) | 8vi 2 parent(v)} x(v) (1 C)/level(v), c(v) C + x(v)

Fig. 9. Pseudo code of the proposed gate sizing algorithm.

B. Algorithm To solve the gate sizing problem, [8] proposes a path-based algorithm, which iteratively finds the current longest path P and assigns the correct output probability for each gate vi 2 P as pi = (1 R)|P| ; it is easily proven using the inequality of arithmetic and geometric means that Âvi 2P pi is minimized when all the pi s take the same value. However, the algorithm has a runtime issue since it needs to enumerate all paths of a circuit in the worst case, which is known to be NP-hard. We propose a graph-based heuristic algorithm shown in Fig. 9 atop the basic idea of [8]. Given a majority circuit G = (V, E), topological vertex ordering of the reverse circuit is generated (L1). Visiting each vertex v from the last level, it associates a value x(v) inversely proportional to the level of v in the current vertex ordering, level(v); another value c(v) is associated to keep track of upstream probability assignments (L2–L4). If a vertex v has only primary inputs (PIs) as fanins, x(v) is given by 1/level(v) (v9 in Fig. 8(a)). Otherwise, x(v) is determined considering the upstream probability assignment (L10–L11) as v1 in Fig. 8(a). Once every vertex is visited, topological ordering of the original circuit is generated (L5). Each vertex v is traversed, and x(v) is updated in the same manner (L6–L8) except the vertices having only primary outputs (POs) as fanouts (L7), e.g. v9 and v8 in Fig. 8(b). The probability of each vertex v is determined as (1 R)x(v) (L9); the smallest gate having a larger correct probability than p(v) is selected for each vertex v. The algorithm has a linear time complexity of O(|V | + |E|). The numbers of iterations L2–L4 and L6–L8 are both |V |; throughout all the iterations, every edge is visited so that the complexity of the loop has bound of O(|V | + |E|). The generation of topological ordering can be done using depthfirst search, whose runtime complexity is also of O(|V | + |E|).

TABLE I C OMPARISON WITH PREVIOUS WORK Name c1908 c1355 alu4 c3540 dalu c5315 c7552 bar des arbiter

# Gates 465 494 716 1112 1263 1767 1955 3406 4200 6082

# Nets 893 943 1414 2170 2447 3320 3644 6673 8140 11904

ICCD’15 [8] Depth 23 16 28 41 26 27 20 12 14 23

Area (µm2 )

Runtime (s)

0.104 0.101 0.186 0.320 0.296 0.333 0.391 0.684 0.766 1.628

V. E XPERIMENTS Our experiments were carried out on a set of circuits extracted from LGSynth91 [13] and EPFL benchmarks [14]. Gate-level netlists in majority logic were obtained using a majority logic optimizer with a depth-reduction script [10]. They were given to our gate sizing algorithm in Fig. 8, which was implemented in Python. To estimate circuit areas, we assumed that a DNA origami of a triangular tiling with 6nm pitch is used to place hairpins [6], and the maximum tolerable error ratio is set to 0.75 [8], [11]. The test circuits were also synthesized in traditional Boolean logic using ABC [15] in a depth-oriented fashion, for the comparison with a previous work [8]. We implemented the gate sizing algorithm presented in [8], and gave it the netlists generated by ABC. Table I shows the comparisons of [8] and ours on the numbers of gates and nets, maximum logic depth, circuit area after gate sizing, and runtime of gate sizing. By using the proposed localized majority gate, the numbers of gates and the maximum logic depth were reduced on average by 7.1% and 18.4%, respectively. These reductions in turn led to average area reduction of 12.8% after gate sizing. Especially, the area reduction were 33.6% and 22.4% for arbiter and dalu, respectively, whose logic depths were significantly decreased by majority logic. Total runtime of the proposed sizing algorithm for all the test circuits was only 1.58s; it is linearly proportional to the gate and net counts as discussed in Section IV-B. On the other hand, the path-based sizing in the previous work took a great deal of time. The runtime depends on the number of paths between circuit inputs and outputs; it took 1972s for sizing c3540 which has about 3173k paths. To make a fair comparison of the performances between the two gate sizing algorithms, we applied the path-based algorithm of [8] to the majority logic netlist, and compared the result with that of ours. The algorithm of [8] took 1706s to run all the circuit, which means our algorithm is 1079⇥ faster than [8]. The resulting circuit area of the algorithm [8] was smaller than that of ours since it exhaustively investigates every circuit path. However, the average area overhead of our gate sizing algorithm was only 1.5%. VI. C ONCLUSION In localized DNA circuits, compact implementation is essential to reduce manufacturing cost of DNA origami board.

73 25 55 1972 19 115 80 61 135 186

# Gates 448 459 711 1053 1056 1663 1720 3218 4181 5511

# Nets 877 872 1449 2111 2130 3201 3249 6296 8258 12497

This work Depth 20 15 24 26 15 20 20 12 14 11

DArea (%) 11.4 8.5 6.4 14.4 22.4 10.7 10.5 6.0 4.2 33.6

Runtime (s) 0.04 0.03 0.07 0.08 0.09 0.12 0.13 0.25 0.33 0.45

We have proposed a localized DNA majority gate to exploit the majority logic in digital logic implementation, and validated its operation using DSD simulations. Our experimental results have demonstrated that total area of a DNA circuit can be reduced by 12.8% on average of test circuits. A gate size selection algorithm for ensuring correct circuit operation has been proposed, which can reduce the runtime of gate sizing algorithm by about 1000⇥ compared to the conventional gate sizing algorithm. ACKNOWLEDGMENT This work was supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MSIP) (No. 2015R1A2A2A01008037). R EFERENCES [1] S. Douglas, I. Bachelet, and G. Church, “A logic-gated nanorobot for targeted transport of molecular payloads,” Science, vol. 335, no. 6070, pp. 831–834, Feb. 2012. [2] G. Seelig et al., “Enzyme-free nucleic acid logic circuits,” Science, vol. 314, no. 5805, pp. 1585–1588, Dec. 2006. [3] L. Qian and E. Winfree, “Scaling up digital circuit computation with DNA strand displacement cascades,” Science, vol. 332, no. 6034, pp. 1196–1201, Jun. 2011. [4] H. Chandran et al., “Localized hybridization circuits,” in Proc. DNA Computing and Molecular Programming, Jan. 2011, pp. 64–83. [5] R. Muscat et al., “DNA-based molecular architecture with spatially localized components,” in Proc. Int. Symp. on Comput. Arch., Jun. 2013, pp. 177–188. [6] P. Rothemund, “Folding DNA to create nanoscale shapes and patterns,” Nature, vol. 440, no. 7082, pp. 297–302, Mar. 2006. [7] D. Zhang and E. Winfree, “Control of DNA strand displacement kinetics using toehold exchange,” Journal of the American Chemical Society, vol. 131, no. 47, pp. 17 303–17 314, Nov. 2009. [8] J. Jung, D. Hyun, and Y. Shin, “Physical synthesis of DNA circuits with spatially localized gates,” in Proc. Int. Conf. on Comput. Design, Oct. 2015, pp. 280–286. [9] M. Krause and P. Pudl´ak, “On the computational power of depth-2 circuits with threshold and modulo gates,” Theoretical Comput. Science, vol. 174, no. 1–2, pp. 137–156, Mar. 1997. [10] L. Amar´u, P.-E. Gaillardon, and G. D. Micheli, “Majority-Inverter Graph: A new paradigm for logic optimization,” IEEE Trans. Comput.Aided Design, vol. 35, no. 5, pp. 806–819, Oct. 2015. [11] M. Lakin et al., “Abstract modelling of tethered DNA circuits,” in Proc. DNA Computing and Molecular Programming, Jan. 2014, pp. 132–147. [12] N. Dalchau et al., “Probabilistic analysis of localized DNA hybridization circuits,” ACS synthetic biology, vol. 4, no. 8, pp. 898–913, July 2015. [13] S. Yang, Logic synthesis and optimization benchmarks user guide: version 3.0. Microelectronics Center of North Carolina (MCNC), 1991. [14] “The EPFL combinational benchmark suite.” [Online]. Available: http://lsi.epfl.ch/benchmarks [15] “ABC: a system for sequential synthesis and verification.” [Online]. Available: http://people.eecs.berkeley.edu/˜alanmi/abc/abc.htm

Localized DNA Circuit Design with Majority Gates

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