IJRIT International Journal of Research in Information Technology, Volume 1, Issue 4,April 2013, Pg. 171-179

International Journal of Research in Information Technology (IJRIT) www.ijrit.com

ISSN 2001-5569

FPGA Based Implementation of Compact Genetic Algorithm 1

Krupesh P. Patel, 2 Mahesh T. Parmar, 3 Markand Raval

1

PG Student, Department of Electronics and Communication, Gujarat Technological University Chandkheda, Gujarat, India 2 PG Student, Department of Electronics and Communication, Gujarat Technological University Chandkheda, Gujarat, India 3 PG Student, Department of Electronics and Communication, Gujarat Technological University Chandkheda, Gujarat, India 1

[email protected] ,

2

[email protected] ,

3

[email protected]

Abstract This paper presents implementation of compact genetic algorithm (CGA) on FPGA. The CGA is a Probability vector based genetic algorithm, which require less memory, less processing power and very simple hardware implementation compare to traditional genetic algorithm. The software implementation is always restricted in term of high real time application by computer system. This paper introduces a hardware structure of CGA. The design is realized using Verilog HDL, then simulated by Xilinx ISE 10.1 and fabricated on FPGA Vertex 4. Keywords: Compact genetic algorithm (CGA), Hardware implementation of CGA. Full text: https://sites.google.com/site/ijrit1/home/V1I427.pdf

IJRIT

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FPGA Based Implementation of Compact Genetic ...

1 krupeshpatel839@yahoo.com , 2 maherohi_2000@yahoo.co.in , 3 ravalmarkand@yahoo.com. Abstract. This paper presents implementation of compact ...
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