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Identify all prime implicants and essential prime impli(,~hts/6f following function usin g ~ v k - map. . ",". , :f(a, b, c, d) = I.m(6, 7, 9,1013) + d.c(l, 4,5,11,15) t « ~ f(a, b, c, d) = nm(1, 2, 3,~, 9,10) + d.c(O, 14, 15) (08 Marks) b. Find minimal sum for following Boolean function u~1rig Quine -McClusky method: f(a, b, c, d) = Im(7, 9, 12, 13, )~, 15) + d.c(4, I J). / (08 Marks) J
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" f(x, y, z) = L.,m(O, I, 3, 4, 6, 7) //) \'> f«w, x, y, z) = nM(O, 1, 2, 3, 4, 6, 12). (04 Marks) Find a minimal sum for following Boolean function using decimal QM method and!>! table reduction. " f(a, b, c, d) =I.m(l, 3, 6, 8, 9,10,,12; 14) + d.c(7, 13)., ; (12 Marks)
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Implement fCa, b, c, d) = Im(O, 1,5,6,7,10,15) using i) 8: 1 MUX with a, b, c as select lines ii) 4: I MUX with a, b as select lines. r(08 Marks) b. What are the problems associated with basic encoder? Explain how can these vPIJl'G~~s be overcome by priority encoder considering 8 input lines. (08 "arks) a.
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Module-3 What is flip-flop. Discuss working principle of SR flip-flop with its TT. Also highlight role of SR flf in switch debouncer circuit. (08 Marks) What is significance of edge triggering? Explain working of +ve edge triggered D flip-flop with their functional table. (08 Marks) lof2
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OR Explain fhe working of MIS JK flip-flop with functional table and timing diagram. Show how race cendition is overcome. . '.-, (10 Marks) Obtain clWacteristic equation for following flip -flops. i) JK ii) SR. ~" 1/ (06 Marks)
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Module-4 c- -\~~ a. Realize a 3 b~;u.y synchronous up counter using JK fljp~1t,'O);?Write excitation table, transition table andlcgic diagram. i-, -, (10 Marks) b. Explain SIPO and PI SO ~hift registers with relevant logic dlagrams. (06 Marks)
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OR Explain the working principle-of 4bit binary ripple counter configured using +ve edge triggered T - FIF. Also draw i1Wn~~diagram. ,;::"i-:' (08 Marks) Explain the operation of universal'-,.,.shifti register Wjth) neat diagram. (08 Marks) .
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M6dule:5 Distinguish between Moore and Mealy mo&l with necessary block diagram. (06 Marks) Construct mealy state diagram that will d&ect input sequence 10110, when input pattern is detected, z is asserted high. Give state diagram for each state. (to Marks) /'
0 ~?"".:..\ --a. Design a cyclic mod 8 synchronous binary counte(tJiing JK flip-flop. Give state diagram, transition table and excita~i~ t~91e. (08 Marks) b. Analyse the following s~Qy~jal circuit shown in figurean.9'<.>-btain: i) Flip-flop input and output equation . /./" ii) Transition equation (c~.equ) ,." ')j iii) Transition table iv) State table ('.~f (08 Marks) v) Draw state diagram.
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