JOURNAL OF TELECOMMUNICATIONS, VOLUME 5, ISSUE 2, NOVEMBER 2010 1

Active-R Dual Input Integrator With Enhanced Time Constant Using a CDBA : Quadrature Oscillator Design P.Venkateswaran, M. Kar, S.Das, and R.Nandi Abstract— A new dual-input integrator using a current differencing buffered amplifier (CDBA) element is presented ; the circuit needs a grounded capacitor and the time constant (τ ) has an enlargement factor being tunable by a single resistor. A sinusoid quadrature oscillator is realized thereafter with a double-integrator loop involving two such integrators. The designs are tested satisfactorily in a frequency-range of 1MHz-20MHz by both hardware implementation and PSPICE macromodel simulation. Index Terms— CDBA, Differential integrator, Quadrature oscillator.

——————————  ——————————

1 INTRODUCTION

W

ITH the advent of the recent CDBA active element [1], several analog signal processing/conditioning circuit design schemes are being proposed recently [2],[3],[4],[5]. The element may be easily configured [5] using a pair of AD-844 type current feedback amplifier (CFA) ; this amplifier provides extended bandwidth and slew rate capabilities over the ubiquitous voltage operational amplifier [6],[7],[8]. Some active-RC integrators using voltage/current mode devices were reported earlier [9],[10],[11] wherein the usefulness of enhanced value of  is cited. An integrator design with dual-input capability at an enlarged- utilizing a single CDBA had not yet been presented. Previously reported differential integrators with single resistor-tunability, use at least two active elements [9],[10],[11]. Here we utilize the transimpedance capacitor (Cz) of the device ; this component is inherently available in the device and hence can be used so that the design becomes active-R without an external capacitor[12],[13]. Since the proposed integrator is compatible to either polarity input signals, a double integrator loop oscillator may be formed by connecting one inverting and the other noninverting stages. As an application, we cascaded two such integrators in a feedback loop so as to derive a quadrature oscillator (QO) ; such oscillators find numerous applications as electronic

functional blocks [14],[15]. Satisfactory test results are obtained for the proposed designs in a frequencyrange of 1MHz~20MHz.

2 ANALYSIS

(a )

(b)

————————————————

• P.Venkateswaran is with the Department of ETCE, Jadavpur University, Kolkata- 700032, India. • M. Kar is with the Department of ECE, Heritage Institute of Technology, Kolkata- 700107, India. • Soumik Das is with the Department of AEIE, Heritage Institute of Technology, Kolkata-700107, India. • R. Nandi , corresponding author is with the Department of ETCE, Jadavpur University, Kolkata- 700032, India.

(c) Fig.1 Symbol of CDBA (a) Four-terminal CDBA building block (b) CFA based implementation of CDBA (c) AD-844 equivalent circuit model

© 2010 JOT http://sites.google.com/site/journaloftelecommunications/

2

sign we selected all passive resistors in Kε range so as to get operating frequencies in MHz bands. Thus ε << 1 and an ideal integration function F(s) = 1/ s εo ; εo = ε ε , can be obtained where an appropriate εenlargement factor is derived using Rb > Ra while Ro tunes it independently. With a nonideal device (ε ≠ 0), however, (2) modifies to

The CDBA is a four-terminal active building block with the following terminal relations

 iz   0 v    w  = δ v p   0     v n   0

α

0

p

0

0

0 0

0 0

−α n   v z    0   iw  0  ip    0   i n 

(1)

Vo = Vin {(1 ε ε t)/ ε (s ε + ε)} ε V {(ε ε) / (s Rb Co + u ) }

The circuit symbols and the CFA- based implementation of the CDBA are shown in Figs. 1(a) and (b); the small signal equivalent circuit with the internal transadmittance Yz = g z + sC z is shown in Fig.1(c) where

where, u = Rb/Rz << 1. The magnitude of the unbalance voltage V had been observed to be insignificant due to ε ε ≈ 0. The time constant modifies to εo' = εo / (1 ε ε t) but its active sensitivity would be quite low, given by Sεo ε p,n = ε p,n / (1 ε ε t) << 1. The quality (Q) of the integrator may be derived after writing F(ε) = 1/( α +jε) and putting Q ε ε/ α , which gives Q = ε/ εz, where εz= 1/RzCz. With the typical values of Rz ≈ 3 Mε and Cz ≈ 5.5 pF one gets fz ≈ 10KHz ; since the proposed design is intended for MHz ranges we could obtain Q >> 1. Thereafter we implemented a sinusoid quadrature oscillator (QO) cascading two such integrators, one being inverting and the other noniverting, in a feedback loop. The design had no external capacitor and no additional condition for oscillation as the integrators are practically ideal ; the oscillation frequency is εo = 1/ √ (εo1 εo2), which could be tuned by one resistor. The frequency stability factor (Sf) is evaluated, if ε is loop phase shift, as Sf = εε/εε at ε = ε / εo = 1 , given by

gz = 1/ rz. The port transfers are α p ,n = 1 - εp,n and δ = 1 – ε0, where ε is port mismatch error of the device. The integrator circuit is shown in Fig.2 ; analysis based on the CDBA nodal relations iz = ip(1 ε εp) ε in (1 ε εn) , Vo = vz (1 ε εo) and vp = vn = 0 yields

{Vo Yz /Rp (1 ε ε t)} = [(V1/R1R2)ε(V2/R2R3)] ε(V/R4)[{(1+ε ε)/Rp}ε (R4 /R2 Rd )] (2) where 1/Rp = (2/Ro)+(1/R1)+(1/R2) and 1/Rd = (2/Ro)+(1/R3)+(1/R4) , ε ε = (εp ε εn) , ε t = (εp + εo) and Yz = (1/Rz) + sCz. The literature [8], [13], [14] indicates ε εε<< 1, which thereby implies ε ε ≈ 0. The realizability condition for a true differential integrator design is first derived assuming an ideal CDBA (ε = 0), given by

R1 = Ra = R3 ;

R2 = Rb = R4

(3)

Writing V1 – V2 = Vin one gets the transfer :

Vo/ Vin ε F(s) = 1 / ε (s ε + ε)

(4)

where ε = 1+ m + 2 k, m = Rb/Ra, k = Rb/Ro, ε = Ra/Rz and ε = Ra Cz. From databook [16],[17] we get 3 Mε ≤ Rz ≤ 5 Mε and 4 pF ≤ Cz≤ 7 pF. In our de-

V1

R2

R1

Sf = (2Rz1/Ra)/ [1+ ε εt+( Rz1/Rz2)] >> 1

p

R0

V0

CDBA

Z

V2 R3

v

R4

n

Cz

Fig.2

(5)

Rz

Proposed dual input tunable integrator utilizing the transadmittance element Yz =(1/ R z) + s( Cz+C)

(6)

3

3 EXPERIMENTAL RESULTS

T

6.00

Voltage (V)

3.00

0.00

-3.00

-6.00 0.00

200.00n

400.00n 600.00n Time (s)

800.00n

1.00u

(a)

T

7.5

T

Amplitude (V)

5

V

-7.5 0

50ns

100ns Time

150ns

0

200ns

0

10

20

30 (MHz)

(b)

40

50

(c)

2020

1/sε1

-1/sε1 Vo1

Vo2

f0 (MHz)

Vc

1515

1010 0 0.0

0.2 0.2

0.4 0.4

0.6 0.6

k = Rb/R0 (d) Fig.2

(e)

(a) Simulation response of proposed dual input integrator with Ra = 1K , Rb = 10 K ., Ro=2.5K (b) QO- response tuned at fo = 20MHz using identical integrators with Ra=Rb=800 , Ro=8K (c) Spectrum of generated wave (d) Double integrator loop sinusoid quadrature-signal (Vo1 & Vo2) oscillator (e) Typical tuning characteristics with at Rb = 800 ohm) : _________ simulation, _ _ _ _ _ hardware test

0.8 0.8

1 1.0

4

The response of the dual-input integrator of with antiphase square wave inputs (V1 = ε V2 = 3V peak at 5MHz) is shown in Fig.3 (a); here the simulation results and hardware circuit response matched quite accurately for signals upto 20 MHz. With sinusoid inputs, the phase error (εe) of the integrator had been measured to be εe < 6o at 20 MHz; the unbalance voltage (V) was seen to be extremely low. The QO responses are shown in Fig.3 (b) and (c). The CDBA had been built with a pair of AD-844 amplifiers [3], [5] biased at Vcc = 0±12 V.d.c. and we measured the transimpedance components as Rz ≈ 3.6 Mε and Cz ≈ 5.1 pF. A comparison in Table 1 shows that the QOs reported recently [3], [5], [14], [15] are essentially activeRC structures with at least two discrete capacitors having a fo-coverage of 20 KHz at a THD% of 1.6 to 2 and Sf ≈ 2n. The proposed QO is an external capacitorless active-R design tunable in a range of 1MHz ≤ fo ≤ 20

MHz at THD = 1.8% and Sf = 2Rz/Ra >> 1 if in (6) the AD-844 devices are assumed matched (εεt ≈ 0).

4 CONCLUSION A new CDBA-transimpedance based external capacitorless dual input integrator with single resistor tunability at enhanced τ-value and its application as a quadrature sinusoid oscillator in a double integrator loop are presented. Test results in a frequency-range of 1MHz-20MHz are verified. A comparison of the oscillator performance with respect to some such previously reported designs indicates superiority of the proposed design in terms of frequency-stability, fo range and THD.

TABLE 1 SOME COMPARISON OF RECENTLY REPORTED QUADRATURE OSCILLATORS Number Ref.

of external

Frequency range reported

Sf

THD (%)

capacitors

(MHz)

[3]

2 to 3

0.001

2/(1+2 ε) ≈ 2

---

[5]

2

0.02

n(2 – 3 ε) ≈ 2 n

1.9

[14]

2

0.02

2n(1- ε) ≈ 2n

2.5

[15]

2

0.016

Proposed

None

20

--(2Rz1/Ra)/ [1+ ε εt+( Rz1/Rz2)] >> 1

1.6 1.8

REFERENCES [1]

[2]

[3]

[4]

C. Acar, and S. Ozoguz, ‘‘A versatile active building block: current differencing buffered amplifier suitable for analog signal processing filters,’’ Microelectronics Journal., vol. 30, pp. 157-160,1999. A. Toker, S. Ozoguz and C. Acer, ‘‘ Current Mode KHN equivalent biquad using CDBAs,’’ Elctronics Lett., vol. 35, pp. 1682-1683, 1999. A. U. Keskin, ‘‘ Voltage mode high-Q bandpass filters and oscillators employing single CDBA and minimum number of components,” Int. J. Electronics, vol. 92, pp. 479-487, 2005. M. Gulsoy and O. Cicekoglu, “Lossless and lossy synthetic inductors employing single current differencing buffered amplifier”, IEICE Trans. Comm., vol. E 88-B, pp.

2152-2155, 2005. [5] W. Tangsrirat , D.Prasertsom, T. Piyatat, and W. Surakampontorn, “Single resistance controlled quadrature oscillator using current differencing buffered amplifiers”, Int.Jl.Electronics , vol. 95 , pp. 1119-1126, 2008. [6] C. Tomazou and J. Lidgey, “Current feedback opamps : A blessing in disguise,” IEEE Circuit. Dev. Magz., vol. 10, pp. 34-37, 1994. [7] G. Palumbo and S. Pennisi, “Current feedback amplifiers versus voltage operational amplifiers,” IEEE Trans.Circuit. Syst. (I), vol. 48, pp. 617-623, 2001. [8] B. J. Maundy, A.R. Sarkar, and S.J. Gift, “A new design for low voltage CMOS current feedback amplifiers,” IEEE Trans. Circuit. Syst. (II), Expr. Birefs, vol. 53, pp.34-38, 2006.

5

[9]

[10]

[11]

[12] [13] [14]

[15]

[16] [17]

D. Patranabis, A.N. Paul, and A.N. Dey, “Efficient enhancement / lowering of integrator and differentiator time constant with Fibonacci numbers helping their evaluation,” IEEE Trans. Circuit. Syst., vol. 29, pp. 409- 411, 1982. R.Nandi and S.B. Ray, “Precise realisation of current mode integrator using current conveyor,” Electronics Lett., vol. 29, pp. 1152-1153, 1993. J.L. Lee and S.I. Liu, “Integrator and differentiator with time constant multiplication using current feedback amplifier”, Electronics Lett., vol. 37, pp.331-333, 2001. J.R.Brand & R. Schaumann, “Active-R filters : review of theory & practice”, IEE Proc. (G), vol.2, pp. 89-101, 1978. R.Nandi, “Tunable active-R oscillator using a CFA”, IEICE Electron. Expr.,vol. 5, pp. 248-253, 2008. J.W. Horng, “Current differencing buffered amplifiers based single resistance controlled quadrature oscillator employing grounded capacitors,” IEICE. Trans. Fund., vol. E85-A, pp.1416-1419, 2002. N. Herencsar, K. Vrba, J. Koton, and A. Lahiri, “Realisations of single-resistance-controlled quadrature oscillators using generalised current follower transconductance amplifier and a unity- gain voltage-follower”, Int.Jl.Electronics, vol. 97, pp.897-906, 2010. Analog Devices : Linear Products Databook, Norwood, MA., USA, 1990. Comlinear Corpn: Application note 200-1: Designer’s guide for 200-series opamps, Fort Collins, Colorado AD-844 in PSPICE library, MicrosimCorp. Corpn., Calif., USA, 1992.

P. Venkateswaran is a Reader in the Dept. of Elecronics & TeleCommunication Engg. (ETCE), Jadavpur University (JU), Kolkata, India. He has published over 30 papers in various National / International Journal / onference Proceedings. His fields of interest are Computer Communication, Microcomputer Systems and Digital/Analog Signal Processing . He is a Member of IEEE (USA), and Present Secretary of Calcutta Chapters of IEEE Communications Society (ComSoc) & IEEE Circuits And Systems Society (CASS). Mousiki Kar is working as a Lecturer in the Dept. of Electronics & Communication Engineering, Heritage Institute of Technology (HITK). Her areas of interest are Analog Signal Processing, Control System Design. She is a Member of IEEE (USA), and IEEE Circuits And Systems Society (CASS). Soumik Das is working as a Lecturer in the Dept. of Applied Electronics & Instrumentation Engineering, HITK, Kolkata, India. His areas of interest are Analog Signal Processing, Power Electronics. He is a Member of IEEE (USA), and IEEE Circuits And Systems Society (CASS). Dr. Rabindranath Nandi is a Professor in the Dept. of ETCE, JU, Kolkata, India. His areas of interest are ASP, DSP, Computer Communication. He has authored more than 110 research papers in National / International Journals and some in Conferences / Seminars. He served as the Head of ETCE Dept., JU during 1999-2001 and served as the Chair of IEEE Calcutta Section during 2003-2005. He has taught in various Institutes abroad. He is now the Chair of IEEE Calcutta CASS chapter.

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