TUAM 4.4 A 4:2:2P@ML MPEG-2 VIDEO ENCODER BOARD USING AN ENHANCED MP@ML VIDEO ENCODER LSI Takeshi E'osliitome, Tosliihiro Minami, Mitsuo Ilieda, Koyo Nitta, and Ibzuhito Suguri
NTT Clylier Space Laboratories 1-1, Hikaririoolta Yokosulta-shi, Kanagawa, 239-0547, .Japan
Abstract
'llie niajor difference bet,ween 4:2:2PBML video encoding and MPQML video encoding is the required
Wc have dcvcloped a sinall, incxpensivc
processing performance. In MPIQMI, video cncod-
4:2:2P(@MLriicoder for coiisuiiier iise by up-
ing, one inacroblock cont,ains six blocks; lour lu-
grading MPCQMLvideo encoder LSI. The encoder is impleriieiited
011 ti
mina.~iccblocks and t,wo chrominance blocks.
P C I board and en-
4:2:4PQh4L video encoding, on the contrary, one
codes video using hot11 MP@ML and 4:2:2P
macroblock contains eight blocks; four luminance
@ML MPEG-2 standards.
hlocks a,nd four chrominance blocks. In order t o encode 4:2:2P@ML video, the ciicoder requires 33%
I. Introduction
more proccssing capability
Higli-quality vidco cncoding syst,ems hased on
111. 4:2:2P E n h a n c e m e n t for M P @ M L M P E G - 2 encoder LSI
4:2:2 profile iMPEG2 will be an essent,ial component, in inukimedia applications.
In
Yome 4:2:2 pro-
file MPEG-2 video encoders have already been an-
In order t o upgrade a MIWML video encoder
nounc.ed; however, t,liey are desigiied for professional
to a 4:2:2PBML video encoder, the following three eiiliaiicernenL were introduced. The first, is the increase of t,he operation frequency froiii 81 t,o 108
use i n , for instmce, broadcast, applications. As a result, these encoders are large and exIJcnsive. A
4:2:2 profile MPEG-2 video encoder for coiisunier use should be sinall a.ud inexprnsive.
Such
xi ~ I I -
M H z . This increases the processing capability of t,lre encoder 1.33 t,inirs, but also increases chip area,
coder could be built by developing an a 4:2:2PQML
and power consumption. However,t,liese disadvaii-
MPEG-2 encoder LSI hmed 011 t,lie MPOMI, MP1SG2 encoder, which is nmss produced at, low cost,. We lia,ve developed a 4:2:2P MPEG-2 video encoder LSI, whicli can encode video i n bot,Ir MlWML
ta,ges are small, a,nd they are acceptable provided
0.25 micron process Lecliiiology is used. T h e second is tlie impleinent,ation of a programmable fraiiic memory interface rnoilule, which hatidles both
The IS1 is a,n enlia,iicetl version of a MP(Qh*lL MPEG-:! video en-
the 4:2:0 and 4:2:2 chrominance forma,t. T h e mod-
codw LSI [?]. Using t,he LSI, wc have cleveloped
usage for each forina,t. T h e progra,nimahilit,y of' t,he
a,nd 4:2:2PQML of' MPICG-2.
a, 4:2:2PIDMI, MPEG:! video encoder, which is
ule ma,kcs it possible t o optiniiar the franie memory niotlule is also ut,ilized t,o optimize IO scheduliiig for
ini-
diffcrent video encoding profiles.
plementecl on single PC boa,rd.
T h e t,liird is (,lie Iiardware/software pwtitioning
11. Requirement of 4:2:2P@ML video encoding
0-7803-5123-1/99/ $10.00 0 1999 IEEE
of bit,strea,ni generat.iorr processes. To support niult,iple profiles and levels of' tlie MPEG-2 standard,
56
the LSI generates a bitstream using both an on-chip
RISC module and VLC hardware module. Profiles and levels ca,u he easily changed by replacing the firmware that runs on the RISC module because t,he slice and higher layers of the hitstream fields are generated by the RISC module.
IV. Conclusion The 4:2:2PQML eucoder we developed by upgrading MPBML video encoder LSI is small and inexpensive, making it suitable for consumer use. The encoder is implemented on a PCI hoard and is ca-
Figure 2: The Photograph of 4:2:2P@ML MPEG-2 video encoding LSI
pa,ble of encoding video usiug hoth MPQML and 4:2:2P@ML MPEG-2 standards.
Acknowledgment The authors wish t,o thank Tofihio Kondo, Ta,keshi Ogura and Susnniu khinose for their support in the developnient of the encoding board.
References [l] 'r. Miiiami e l al., "A Single-chip MPEG-2
MPBML Video Encoder LS1 with Multi-chip Configura,tion for a Single-board MPQHL Encoder", Hot Chips X. Figure 3: The Photograph of 4:2:2P@ML MPEG-2 video encoding board
Input
b116Iream Oulpul
Vitlea inpu
Composite(525/625) S video(525/625) MPEG-2 video
Coding Scheme
Frame Structure SDRAM
External Clock freouencv" Inlenal Clock frequency Output Power Consumption Size 1
Figure 1: The hlockdiagram of 4:2:2PBML MPEG-2 video encoding LSI
57
/
11 27MHz.36MHz
1 I08MHz
Elementary Stream
7.5w PCI-hoard
